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Searched refs:MPCC3_MPCC_CONTROL__MPCC_BG_BPC__SHIFT (Results 1 – 12 of 12) sorted by relevance

/Linux-v6.6/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_2_0_3_sh_mask.h11083 #define MPCC3_MPCC_CONTROL__MPCC_BG_BPC__SHIFT … macro
Ddcn_3_0_1_sh_mask.h40319 #define MPCC3_MPCC_CONTROL__MPCC_BG_BPC__SHIFT … macro
Ddcn_2_1_0_sh_mask.h20473 #define MPCC3_MPCC_CONTROL__MPCC_BG_BPC__SHIFT … macro
Ddcn_3_2_1_sh_mask.h15300 #define MPCC3_MPCC_CONTROL__MPCC_BG_BPC__SHIFT … macro
Ddcn_3_1_5_sh_mask.h20798 #define MPCC3_MPCC_CONTROL__MPCC_BG_BPC__SHIFT … macro
Ddcn_3_1_2_sh_mask.h22781 #define MPCC3_MPCC_CONTROL__MPCC_BG_BPC__SHIFT … macro
Ddcn_3_0_2_sh_mask.h47321 #define MPCC3_MPCC_CONTROL__MPCC_BG_BPC__SHIFT … macro
Ddcn_3_1_4_sh_mask.h56004 #define MPCC3_MPCC_CONTROL__MPCC_BG_BPC__SHIFT … macro
Ddcn_3_1_6_sh_mask.h23539 #define MPCC3_MPCC_CONTROL__MPCC_BG_BPC__SHIFT … macro
Ddcn_3_0_0_sh_mask.h54471 #define MPCC3_MPCC_CONTROL__MPCC_BG_BPC__SHIFT … macro
Ddcn_2_0_0_sh_mask.h23541 #define MPCC3_MPCC_CONTROL__MPCC_BG_BPC__SHIFT … macro
Ddcn_3_2_0_sh_mask.h15297 #define MPCC3_MPCC_CONTROL__MPCC_BG_BPC__SHIFT … macro