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Searched refs:MPCC1_MPCC_STATUS__MPCC_DISABLED__SHIFT (Results 1 – 13 of 13) sorted by relevance

/Linux-v6.6/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_2_0_3_sh_mask.h10964 #define MPCC1_MPCC_STATUS__MPCC_DISABLED__SHIFT … macro
Ddcn_3_0_3_sh_mask.h24264 #define MPCC1_MPCC_STATUS__MPCC_DISABLED__SHIFT … macro
Ddcn_3_0_1_sh_mask.h40215 #define MPCC1_MPCC_STATUS__MPCC_DISABLED__SHIFT … macro
Ddcn_2_1_0_sh_mask.h20350 #define MPCC1_MPCC_STATUS__MPCC_DISABLED__SHIFT … macro
Ddcn_3_2_1_sh_mask.h15191 #define MPCC1_MPCC_STATUS__MPCC_DISABLED__SHIFT … macro
Ddcn_3_1_5_sh_mask.h20694 #define MPCC1_MPCC_STATUS__MPCC_DISABLED__SHIFT … macro
Ddcn_3_1_2_sh_mask.h22677 #define MPCC1_MPCC_STATUS__MPCC_DISABLED__SHIFT … macro
Ddcn_3_0_2_sh_mask.h47217 #define MPCC1_MPCC_STATUS__MPCC_DISABLED__SHIFT … macro
Ddcn_3_1_4_sh_mask.h55900 #define MPCC1_MPCC_STATUS__MPCC_DISABLED__SHIFT … macro
Ddcn_3_1_6_sh_mask.h23435 #define MPCC1_MPCC_STATUS__MPCC_DISABLED__SHIFT … macro
Ddcn_3_0_0_sh_mask.h54368 #define MPCC1_MPCC_STATUS__MPCC_DISABLED__SHIFT … macro
Ddcn_2_0_0_sh_mask.h23418 #define MPCC1_MPCC_STATUS__MPCC_DISABLED__SHIFT … macro
Ddcn_3_2_0_sh_mask.h15188 #define MPCC1_MPCC_STATUS__MPCC_DISABLED__SHIFT … macro