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Searched refs:MPCC0_MPCC_CONTROL__MPCC_GLOBAL_GAIN_MASK (Results 1 – 14 of 14) sorted by relevance

/Linux-v6.6/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_2_0_3_sh_mask.h10812 #define MPCC0_MPCC_CONTROL__MPCC_GLOBAL_GAIN_MASK … macro
Ddcn_3_0_3_sh_mask.h24130 #define MPCC0_MPCC_CONTROL__MPCC_GLOBAL_GAIN_MASK … macro
Ddcn_3_0_1_sh_mask.h40081 #define MPCC0_MPCC_CONTROL__MPCC_GLOBAL_GAIN_MASK … macro
Ddcn_2_1_0_sh_mask.h20196 #define MPCC0_MPCC_CONTROL__MPCC_GLOBAL_GAIN_MASK … macro
Ddcn_3_2_1_sh_mask.h15047 #define MPCC0_MPCC_CONTROL__MPCC_GLOBAL_GAIN_MASK … macro
Ddcn_1_0_sh_mask.h18818 #define MPCC0_MPCC_CONTROL__MPCC_GLOBAL_GAIN_MASK … macro
Ddcn_3_1_5_sh_mask.h20560 #define MPCC0_MPCC_CONTROL__MPCC_GLOBAL_GAIN_MASK … macro
Ddcn_3_1_2_sh_mask.h22543 #define MPCC0_MPCC_CONTROL__MPCC_GLOBAL_GAIN_MASK … macro
Ddcn_3_0_2_sh_mask.h47083 #define MPCC0_MPCC_CONTROL__MPCC_GLOBAL_GAIN_MASK … macro
Ddcn_3_1_4_sh_mask.h55766 #define MPCC0_MPCC_CONTROL__MPCC_GLOBAL_GAIN_MASK … macro
Ddcn_3_1_6_sh_mask.h23301 #define MPCC0_MPCC_CONTROL__MPCC_GLOBAL_GAIN_MASK … macro
Ddcn_3_0_0_sh_mask.h54234 #define MPCC0_MPCC_CONTROL__MPCC_GLOBAL_GAIN_MASK … macro
Ddcn_2_0_0_sh_mask.h23264 #define MPCC0_MPCC_CONTROL__MPCC_GLOBAL_GAIN_MASK … macro
Ddcn_3_2_0_sh_mask.h15044 #define MPCC0_MPCC_CONTROL__MPCC_GLOBAL_GAIN_MASK … macro