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Searched refs:MMSCH_V4_0_INSERT_DIRECT_WT (Results 1 – 5 of 5) sorted by relevance

/Linux-v6.6/drivers/gpu/drm/amd/amdgpu/
Dvcn_v4_0_3.c900 MMSCH_V4_0_INSERT_DIRECT_WT(SOC15_REG_OFFSET(VCN, 0, in vcn_v4_0_3_start_sriov()
904 MMSCH_V4_0_INSERT_DIRECT_WT(SOC15_REG_OFFSET(VCN, 0, in vcn_v4_0_3_start_sriov()
909 MMSCH_V4_0_INSERT_DIRECT_WT(SOC15_REG_OFFSET(VCN, 0, in vcn_v4_0_3_start_sriov()
912 MMSCH_V4_0_INSERT_DIRECT_WT(SOC15_REG_OFFSET(VCN, 0, in vcn_v4_0_3_start_sriov()
915 MMSCH_V4_0_INSERT_DIRECT_WT(SOC15_REG_OFFSET(VCN, 0, in vcn_v4_0_3_start_sriov()
919 MMSCH_V4_0_INSERT_DIRECT_WT(SOC15_REG_OFFSET(VCN, 0, in vcn_v4_0_3_start_sriov()
924 MMSCH_V4_0_INSERT_DIRECT_WT(SOC15_REG_OFFSET(VCN, 0, in vcn_v4_0_3_start_sriov()
929 MMSCH_V4_0_INSERT_DIRECT_WT(SOC15_REG_OFFSET(VCN, 0, in vcn_v4_0_3_start_sriov()
931 MMSCH_V4_0_INSERT_DIRECT_WT(SOC15_REG_OFFSET(VCN, 0, in vcn_v4_0_3_start_sriov()
933 MMSCH_V4_0_INSERT_DIRECT_WT(SOC15_REG_OFFSET(VCN, 0, in vcn_v4_0_3_start_sriov()
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Dvcn_v4_0.c1271 MMSCH_V4_0_INSERT_DIRECT_WT(SOC15_REG_OFFSET(VCN, i, in vcn_v4_0_start_sriov()
1274 MMSCH_V4_0_INSERT_DIRECT_WT(SOC15_REG_OFFSET(VCN, i, in vcn_v4_0_start_sriov()
1278 MMSCH_V4_0_INSERT_DIRECT_WT(SOC15_REG_OFFSET(VCN, i, in vcn_v4_0_start_sriov()
1282 MMSCH_V4_0_INSERT_DIRECT_WT(SOC15_REG_OFFSET(VCN, i, in vcn_v4_0_start_sriov()
1285 MMSCH_V4_0_INSERT_DIRECT_WT(SOC15_REG_OFFSET(VCN, i, in vcn_v4_0_start_sriov()
1289 MMSCH_V4_0_INSERT_DIRECT_WT(SOC15_REG_OFFSET(VCN, i, in vcn_v4_0_start_sriov()
1294 MMSCH_V4_0_INSERT_DIRECT_WT(SOC15_REG_OFFSET(VCN, i, in vcn_v4_0_start_sriov()
1299 MMSCH_V4_0_INSERT_DIRECT_WT(SOC15_REG_OFFSET(VCN, i, in vcn_v4_0_start_sriov()
1302 MMSCH_V4_0_INSERT_DIRECT_WT(SOC15_REG_OFFSET(VCN, i, in vcn_v4_0_start_sriov()
1305 MMSCH_V4_0_INSERT_DIRECT_WT(SOC15_REG_OFFSET(VCN, i, in vcn_v4_0_start_sriov()
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Dmmsch_v4_0.h117 #define MMSCH_V4_0_INSERT_DIRECT_WT(reg, value) { \ macro
Djpeg_v4_0.c448 MMSCH_V4_0_INSERT_DIRECT_WT(SOC15_REG_OFFSET(JPEG, 0, in jpeg_v4_0_start_sriov()
451 MMSCH_V4_0_INSERT_DIRECT_WT(SOC15_REG_OFFSET(JPEG, 0, in jpeg_v4_0_start_sriov()
454 MMSCH_V4_0_INSERT_DIRECT_WT(SOC15_REG_OFFSET(JPEG, 0, in jpeg_v4_0_start_sriov()
Djpeg_v4_0_3.c217 MMSCH_V4_0_INSERT_DIRECT_WT(tmp, lower_32_bits(ring->gpu_addr)); in jpeg_v4_0_3_start_sriov()
219 MMSCH_V4_0_INSERT_DIRECT_WT(tmp, upper_32_bits(ring->gpu_addr)); in jpeg_v4_0_3_start_sriov()
221 MMSCH_V4_0_INSERT_DIRECT_WT(tmp, ring->ring_size / 4); in jpeg_v4_0_3_start_sriov()