Searched refs:MISC_REG_CPMU_LP_FW_ENABLE_P0 (Results 1 – 2 of 2) sorted by relevance
1513 #define MISC_REG_CPMU_LP_FW_ENABLE_P0 0xa84c macro
2958 REG_WR(bp, MISC_REG_CPMU_LP_FW_ENABLE_P0 + (params->port << 2), 0); in bnx2x_eee_disable()6665 REG_WR(bp, MISC_REG_CPMU_LP_FW_ENABLE_P0 + (params->port << 2), in bnx2x_update_link_down()6716 REG_WR(bp, MISC_REG_CPMU_LP_FW_ENABLE_P0 + in bnx2x_update_link_up()
