Searched refs:MG_PLL_DIV1 (Results 1 – 2 of 2) sorted by relevance
216 #define MG_PLL_DIV1(tc_port) _MMIO_PORT((tc_port), _MG_PLL_DIV1_PORT1, \ macro
3435 hw_state->mg_pll_div1 = intel_de_read(dev_priv, MG_PLL_DIV1(tc_port)); in mg_pll_get_hw_state()3678 intel_de_write(dev_priv, MG_PLL_DIV1(tc_port), hw_state->mg_pll_div1); in icl_mg_pll_write()
