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Searched refs:MDIO_MMD_PCS (Results 1 – 25 of 36) sorted by relevance

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/Linux-v6.6/drivers/net/phy/
Dmarvell-88q2xxx.c35 ret = phy_write_mmd(phydev, MDIO_MMD_PCS, in mv88q2xxx_soft_reset()
40 return phy_read_mmd_poll_timeout(phydev, MDIO_MMD_PCS, in mv88q2xxx_soft_reset()
66 ret = phy_read_mmd(phydev, MDIO_MMD_PCS, MDIO_PCS_1000BT1_STAT); in mv88q2xxx_read_link_gbit()
74 ret = phy_read_mmd(phydev, MDIO_MMD_PCS, MDIO_PCS_1000BT1_STAT); in mv88q2xxx_read_link_gbit()
98 ret = phy_read_mmd(phydev, MDIO_MMD_PCS, MDIO_MMD_PCS_MV_100BT1_STAT1); in mv88q2xxx_read_link_100m()
105 ret = phy_read_mmd(phydev, MDIO_MMD_PCS, MDIO_MMD_PCS_MV_100BT1_STAT1); in mv88q2xxx_read_link_100m()
211 ret = phy_read_mmd(phydev, MDIO_MMD_PCS, 0x8230); in mv88q2xxxx_get_sqi()
221 ret = phy_modify_mmd(phydev, MDIO_MMD_PCS, 0xFC5D, 0x00FF, 0x00AC); in mv88q2xxxx_get_sqi()
225 ret = phy_read_mmd(phydev, MDIO_MMD_PCS, 0xfc88); in mv88q2xxxx_get_sqi()
Dbcm87xx.c114 pcs_status = phy_read_mmd(phydev, MDIO_MMD_PCS, in bcm87xx_read_status()
144 reg = phy_read_mmd(phydev, MDIO_MMD_PCS, BCM87XX_LASI_CONTROL); in bcm87xx_config_intr()
150 err = phy_read_mmd(phydev, MDIO_MMD_PCS, BCM87XX_LASI_STATUS); in bcm87xx_config_intr()
155 err = phy_write_mmd(phydev, MDIO_MMD_PCS, in bcm87xx_config_intr()
159 err = phy_write_mmd(phydev, MDIO_MMD_PCS, in bcm87xx_config_intr()
164 err = phy_read_mmd(phydev, MDIO_MMD_PCS, BCM87XX_LASI_STATUS); in bcm87xx_config_intr()
Dmarvell-88x2222.c92 int ret = phy_clear_bits_mmd(phydev, MDIO_MMD_PCS, MV_1GBX_CTRL, in mv2222_disable_aneg()
102 int ret = phy_set_bits_mmd(phydev, MDIO_MMD_PCS, MV_1GBX_CTRL, in mv2222_enable_aneg()
121 return phy_modify_mmd(phydev, MDIO_MMD_PCS, in mv2222_set_sgmii_speed()
132 return phy_modify_mmd(phydev, MDIO_MMD_PCS, in mv2222_set_sgmii_speed()
142 return phy_modify_mmd(phydev, MDIO_MMD_PCS, in mv2222_set_sgmii_speed()
294 ret = phy_modify_mmd(phydev, MDIO_MMD_PCS, MV_1GBX_ADVERTISE, in mv2222_config_aneg()
309 ret = phy_read_mmd(phydev, MDIO_MMD_PCS, MDIO_STAT1); in mv2222_aneg_done()
317 ret = phy_read_mmd(phydev, MDIO_MMD_PCS, MV_1GBX_STAT); in mv2222_aneg_done()
330 val = phy_read_mmd(phydev, MDIO_MMD_PCS, MDIO_STAT1); in mv2222_read_status_10g()
366 val = phy_read_mmd(phydev, MDIO_MMD_PCS, MV_1GBX_STAT); in mv2222_read_status_1g()
[all …]
Dat803x.c466 phy_write_mmd(phydev, MDIO_MMD_PCS, offsets[i], in at803x_set_wol()
471 ret = phy_modify_mmd(phydev, MDIO_MMD_PCS, in at803x_set_wol()
484 ret = phy_modify_mmd(phydev, MDIO_MMD_PCS, in at803x_set_wol()
555 val = phy_read_mmd(phydev, MDIO_MMD_PCS, stat.reg); in at803x_get_stat()
893 ret = phy_modify_mmd(phydev, MDIO_MMD_PCS, in at803x_probe()
940 return phy_modify_mmd(phydev, MDIO_MMD_PCS, in at803x_smarteee_config()
955 ret = phy_modify_mmd(phydev, MDIO_MMD_PCS, AT803X_MMD3_SMARTEEE_CTL1, in at803x_smarteee_config()
960 return phy_modify_mmd(phydev, MDIO_MMD_PCS, AT803X_MMD3_SMARTEEE_CTL3, in at803x_smarteee_config()
1612 phy_write_mmd(phydev, MDIO_MMD_PCS, MDIO_AZ_DEBUG, 0x803f); in qca83xx_config_init()
1724 phy_write_mmd(phydev, MDIO_MMD_PCS, QCA808X_PHY_MMD3_DEBUG_1, in qca808x_phy_fast_retrain_config()
[all …]
Dsmsc.c280 rc = phy_write_mmd(phydev, MDIO_MMD_PCS, MII_LAN874X_PHY_MMD_WOL_WUCSR, in lan874x_phy_config_init()
286 rc = phy_write_mmd(phydev, MDIO_MMD_PCS, MII_LAN874X_PHY_MMD_MCFGR, in lan874x_phy_config_init()
304 rc = phy_read_mmd(phydev, MDIO_MMD_PCS, MII_LAN874X_PHY_MMD_WOL_WUCSR); in lan874x_get_wol()
376 rc = phy_write_mmd(phydev, MDIO_MMD_PCS, in lan874x_set_wol_pattern()
382 rc = phy_write_mmd(phydev, MDIO_MMD_PCS, in lan874x_set_wol_pattern()
390 rc = phy_write_mmd(phydev, MDIO_MMD_PCS, reg, *mask); in lan874x_set_wol_pattern()
400 phy_write_mmd(phydev, MDIO_MMD_PCS, reg, 0); in lan874x_set_wol_pattern()
424 rc = phy_read_mmd(phydev, MDIO_MMD_PCS, MII_LAN874X_PHY_MMD_WOL_WUCSR); in lan874x_set_wol()
486 rc = phy_write_mmd(phydev, MDIO_MMD_PCS, reg, in lan874x_set_wol()
493 rc = phy_write_mmd(phydev, MDIO_MMD_PCS, MII_LAN874X_PHY_MMD_WOL_WUCSR, in lan874x_set_wol()
Dmarvell10g.c193 return phy_read_mmd(phydev, MDIO_MMD_PCS, MV_PCS_TEMP); in mv2110_hwmon_read_temp_reg()
350 err = phy_modify_mmd(phydev, MDIO_MMD_PCS, unit + MDIO_CTRL1, in mv3310_reset()
355 return phy_read_mmd_poll_timeout(phydev, MDIO_MMD_PCS, in mv3310_reset()
369 val = phy_read_mmd(phydev, MDIO_MMD_PCS, MV_PCS_DSC1); in mv3310_get_downshift()
392 return phy_clear_bits_mmd(phydev, MDIO_MMD_PCS, MV_PCS_DSC1, in mv3310_set_downshift()
411 err = phy_modify_mmd(phydev, MDIO_MMD_PCS, MV_PCS_DSC2, in mv3310_set_downshift()
421 return phy_modify_mmd(phydev, MDIO_MMD_PCS, MV_PCS_DSC1, in mv3310_set_downshift()
430 val = phy_read_mmd(phydev, MDIO_MMD_PCS, MV_PCS_CSCR1); in mv3310_get_edpd()
471 err = phy_modify_mmd_changed(phydev, MDIO_MMD_PCS, MV_PCS_CSCR1, in mv3310_set_edpd()
870 err = phy_modify_mmd_changed(phydev, MDIO_MMD_PCS, MV_PCS_CSCR1, in mv3310_config_mdix()
[all …]
Dadin1100.c168 return phy_set_bits_mmd(phydev, MDIO_MMD_PCS, MDIO_PCS_10T1L_CTRL, in adin_set_loopback()
172 return phy_clear_bits_mmd(phydev, MDIO_MMD_PCS, MDIO_PCS_10T1L_CTRL, in adin_set_loopback()
Dmicrochip.c325 val = phy_read_mmd(phydev, MDIO_MMD_PCS, in lan88xx_config_init()
329 phy_write_mmd(phydev, MDIO_MMD_PCS, PHY_ARDENNES_MMD_DEV_3_PHY_CFG, in lan88xx_config_init()
Dadin.c185 { MDIO_MMD_PCS, MDIO_PCS_EEE_ABLE, ADIN1300_EEE_CAP_REG },
188 { MDIO_MMD_PCS, MDIO_CTRL1, ADIN1300_CLOCK_STOP_REG },
189 { MDIO_MMD_PCS, MDIO_PCS_EEE_WK_ERR, ADIN1300_LPI_WAKE_ERR_CNT_REG },
Drealtek.c592 if (devnum == MDIO_MMD_PCS && regnum == MDIO_PCS_EEE_ABLE) { in rtlgen_read_mmd()
634 if (devnum == MDIO_MMD_PCS && regnum == MDIO_PCS_EEE_ABLE2) { in rtl822x_read_mmd()
/Linux-v6.6/drivers/net/ethernet/amd/xgbe/
Dxgbe-phy-v1.c322 reg = XMDIO_READ(pdata, MDIO_MMD_PCS, MDIO_CTRL1); in xgbe_phy_pcs_power_cycle()
325 XMDIO_WRITE(pdata, MDIO_MMD_PCS, MDIO_CTRL1, reg); in xgbe_phy_pcs_power_cycle()
330 XMDIO_WRITE(pdata, MDIO_MMD_PCS, MDIO_CTRL1, reg); in xgbe_phy_pcs_power_cycle()
373 reg = XMDIO_READ(pdata, MDIO_MMD_PCS, MDIO_CTRL2); in xgbe_phy_kr_mode()
376 XMDIO_WRITE(pdata, MDIO_MMD_PCS, MDIO_CTRL2, reg); in xgbe_phy_kr_mode()
378 reg = XMDIO_READ(pdata, MDIO_MMD_PCS, MDIO_CTRL1); in xgbe_phy_kr_mode()
381 XMDIO_WRITE(pdata, MDIO_MMD_PCS, MDIO_CTRL1, reg); in xgbe_phy_kr_mode()
416 reg = XMDIO_READ(pdata, MDIO_MMD_PCS, MDIO_CTRL2); in xgbe_phy_kx_2500_mode()
419 XMDIO_WRITE(pdata, MDIO_MMD_PCS, MDIO_CTRL2, reg); in xgbe_phy_kx_2500_mode()
421 reg = XMDIO_READ(pdata, MDIO_MMD_PCS, MDIO_CTRL1); in xgbe_phy_kx_2500_mode()
[all …]
Dxgbe-mdio.c164 reg = XMDIO_READ(pdata, MDIO_MMD_PCS, MDIO_PCS_DIG_CTRL); in xgbe_an37_disable_interrupts()
166 XMDIO_WRITE(pdata, MDIO_MMD_PCS, MDIO_PCS_DIG_CTRL, reg); in xgbe_an37_disable_interrupts()
173 reg = XMDIO_READ(pdata, MDIO_MMD_PCS, MDIO_PCS_DIG_CTRL); in xgbe_an37_enable_interrupts()
175 XMDIO_WRITE(pdata, MDIO_MMD_PCS, MDIO_PCS_DIG_CTRL, reg); in xgbe_an37_enable_interrupts()
1545 XMDIO_READ(pdata, MDIO_MMD_PCS, MDIO_CTRL1)); in xgbe_dump_phy_registers()
1547 XMDIO_READ(pdata, MDIO_MMD_PCS, MDIO_STAT1)); in xgbe_dump_phy_registers()
1549 XMDIO_READ(pdata, MDIO_MMD_PCS, MDIO_DEVID1)); in xgbe_dump_phy_registers()
1551 XMDIO_READ(pdata, MDIO_MMD_PCS, MDIO_DEVID2)); in xgbe_dump_phy_registers()
1553 XMDIO_READ(pdata, MDIO_MMD_PCS, MDIO_DEVS1)); in xgbe_dump_phy_registers()
1555 XMDIO_READ(pdata, MDIO_MMD_PCS, MDIO_DEVS2)); in xgbe_dump_phy_registers()
[all …]
Dxgbe-platform.c540 pdata->lpm_ctrl = XMDIO_READ(pdata, MDIO_MMD_PCS, MDIO_CTRL1); in xgbe_platform_suspend()
542 XMDIO_WRITE(pdata, MDIO_MMD_PCS, MDIO_CTRL1, pdata->lpm_ctrl); in xgbe_platform_suspend()
558 XMDIO_WRITE(pdata, MDIO_MMD_PCS, MDIO_CTRL1, pdata->lpm_ctrl); in xgbe_platform_resume()
Dxgbe-pci.c446 pdata->lpm_ctrl = XMDIO_READ(pdata, MDIO_MMD_PCS, MDIO_CTRL1); in xgbe_pci_suspend()
448 XMDIO_WRITE(pdata, MDIO_MMD_PCS, MDIO_CTRL1, pdata->lpm_ctrl); in xgbe_pci_suspend()
462 XMDIO_WRITE(pdata, MDIO_MMD_PCS, MDIO_CTRL1, pdata->lpm_ctrl); in xgbe_pci_resume()
/Linux-v6.6/drivers/net/ethernet/chelsio/cxgb/
Dmv88x201x.c46 cphy_mdio_write(cphy, MDIO_MMD_PCS, 0x8304, 0xdddd); in led_init()
214 cphy_mdio_read(cphy, MDIO_MMD_PCS, 0x8300, &val); in mv88x201x_phy_create()
215 cphy_mdio_write(cphy, MDIO_MMD_PCS, 0x8300, val | 1); in mv88x201x_phy_create()
219 cphy_mdio_read(cphy, MDIO_MMD_PCS, MDIO_STAT2, &val); in mv88x201x_phy_create()
/Linux-v6.6/drivers/vfio/platform/reset/
Dvfio_platform_amdxgbe.c69 pcs_value = xmdio_read(xpcs_regs->ioaddr, MDIO_MMD_PCS, MDIO_CTRL1); in vfio_platform_amdxgbe_reset()
71 xmdio_write(xpcs_regs->ioaddr, MDIO_MMD_PCS, MDIO_CTRL1, pcs_value); in vfio_platform_amdxgbe_reset()
76 pcs_value = xmdio_read(xpcs_regs->ioaddr, MDIO_MMD_PCS, in vfio_platform_amdxgbe_reset()
/Linux-v6.6/drivers/net/ethernet/sfc/falcon/
Dtxc43128_phy.c212 ctrl = ef4_mdio_read(efx, MDIO_MMD_PCS, TXC_MTDIABLO_CTRL); in txc_bist_one()
214 ef4_mdio_write(efx, MDIO_MMD_PCS, TXC_MTDIABLO_CTRL, ctrl); in txc_bist_one()
265 ef4_mdio_write(efx, MDIO_MMD_PCS, TXC_MTDIABLO_CTRL, ctrl); in txc_bist_one()
272 return txc_bist_one(efx, MDIO_MMD_PCS, TXC_BIST_CTRL_TYPE_TSD); in txc_bist()
403 txc_glrgs_lane_power(efx, MDIO_MMD_PCS); in txc_set_power()
436 txc_reset_logic_mmd(efx, MDIO_MMD_PCS); in txc_reset_logic()
Dqt202x_phy.c81 reg = ef4_mdio_read(efx, MDIO_MMD_PCS, PCS_FW_HEARTBEAT_REG); in qt2025c_wait_heartbeat()
112 reg = ef4_mdio_read(efx, MDIO_MMD_PCS, PCS_UC8051_STATUS_REG); in qt2025c_wait_fw_status_good()
167 firmware_id[i] = ef4_mdio_read(efx, MDIO_MMD_PCS, in qt2025c_firmware_id()
464 mmd = MDIO_MMD_PCS; in qt202x_phy_get_module_eeprom()
Dmdio_10g.c190 ef4_mdio_set_flag(efx, MDIO_MMD_PCS, in ef4_mdio_phy_reconfigure()
Dtenxpress.c151 ef4_mdio_write(efx, MDIO_MMD_PCS, PCS_TEST_SELECT_REG, in tenxpress_init()
/Linux-v6.6/drivers/net/pcs/
Dpcs-xpcs-wx.c163 ret = xpcs_read(xpcs, MDIO_MMD_PCS, MDIO_CTRL2); in txgbe_xpcs_mode_quirk()
196 xpcs_write(xpcs, MDIO_MMD_PCS, MDIO_CTRL2, MDIO_PCS_CTRL2_10GBR); in txgbe_xpcs_switch_mode()
202 xpcs_write(xpcs, MDIO_MMD_PCS, MDIO_CTRL2, MDIO_PCS_CTRL2_10GBX); in txgbe_xpcs_switch_mode()
204 xpcs_write(xpcs, MDIO_MMD_PCS, MDIO_CTRL1, 0); in txgbe_xpcs_switch_mode()
Dpcs-xpcs.c233 return xpcs_read_vendor(xpcs, MDIO_MMD_PCS, reg); in xpcs_read_vpcs()
238 return xpcs_write_vendor(xpcs, MDIO_MMD_PCS, reg, val); in xpcs_write_vpcs()
288 dev = MDIO_MMD_PCS; in xpcs_soft_reset()
323 ret = xpcs_read(xpcs, MDIO_MMD_PCS, MDIO_STAT2); in xpcs_read_fault_c73()
332 ret = xpcs_read_vendor(xpcs, MDIO_MMD_PCS, DW_VR_XS_PCS_DIG_STS); in xpcs_read_fault_c73()
341 ret = xpcs_read(xpcs, MDIO_MMD_PCS, MDIO_PCS_10GBRT_STAT1); in xpcs_read_fault_c73()
348 ret = xpcs_read(xpcs, MDIO_MMD_PCS, MDIO_PCS_10GBRT_STAT2); in xpcs_read_fault_c73()
930 pcs_stat1 = xpcs_read(xpcs, MDIO_MMD_PCS, MDIO_STAT1); in xpcs_get_state_c73()
1210 ret = xpcs_read(xpcs, MDIO_MMD_PCS, MII_PHYSID1); in xpcs_get_id()
1216 ret = xpcs_read(xpcs, MDIO_MMD_PCS, MII_PHYSID2); in xpcs_get_id()
/Linux-v6.6/include/uapi/linux/
Dmdio.h21 #define MDIO_MMD_PCS 3 /* Physical Coding Sublayer */ macro
150 #define MDIO_DEVS_PCS MDIO_DEVS_PRESENT(MDIO_MMD_PCS)
/Linux-v6.6/drivers/net/ethernet/aquantia/atlantic/hw_atl/
Dhw_atl_b0.c1365 aq_phy_write_reg(self, MDIO_MMD_PCS, 0xc611, enable ? 0x71 : 0); in hw_atl_b0_extts_gpio_enable()
1381 sec_l = aq_phy_read_reg(self, MDIO_MMD_PCS, 0xc914); in hw_atl_b0_get_sync_ts()
1383 sec_h = aq_phy_read_reg(self, MDIO_MMD_PCS, 0xc915); in hw_atl_b0_get_sync_ts()
1385 nsec_l = aq_phy_read_reg(self, MDIO_MMD_PCS, 0xc916); in hw_atl_b0_get_sync_ts()
1387 nsec_h = aq_phy_read_reg(self, MDIO_MMD_PCS, 0xc917); in hw_atl_b0_get_sync_ts()
/Linux-v6.6/drivers/net/ethernet/chelsio/cxgb3/
Dael1002.c185 err = t3_mdio_read(phy, MDIO_MMD_PCS, in get_link_status_r()
838 err = t3_mdio_read(phy, MDIO_MMD_PCS, in get_link_status_x()

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