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Searched refs:MCIF_CONTROL__MCIF_MC_LATENCY_COUNTER_ENABLE_MASK (Results 1 – 19 of 19) sorted by relevance

/Linux-v6.6/drivers/gpu/drm/amd/include/asic_reg/dce/
Ddce_6_0_sh_mask.h7731 #define MCIF_CONTROL__MCIF_MC_LATENCY_COUNTER_ENABLE_MASK 0x40000000L macro
Ddce_8_0_sh_mask.h2401 #define MCIF_CONTROL__MCIF_MC_LATENCY_COUNTER_ENABLE_MASK 0x40000000 macro
Ddce_10_0_sh_mask.h2237 #define MCIF_CONTROL__MCIF_MC_LATENCY_COUNTER_ENABLE_MASK 0x40000000 macro
Ddce_11_0_sh_mask.h2189 #define MCIF_CONTROL__MCIF_MC_LATENCY_COUNTER_ENABLE_MASK 0x40000000 macro
Ddce_11_2_sh_mask.h2385 #define MCIF_CONTROL__MCIF_MC_LATENCY_COUNTER_ENABLE_MASK 0x40000000 macro
Ddce_12_0_sh_mask.h3653 #define MCIF_CONTROL__MCIF_MC_LATENCY_COUNTER_ENABLE_MASK … macro
/Linux-v6.6/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_3_0_3_sh_mask.h5404 #define MCIF_CONTROL__MCIF_MC_LATENCY_COUNTER_ENABLE_MASK … macro
Ddcn_3_0_1_sh_mask.h6905 #define MCIF_CONTROL__MCIF_MC_LATENCY_COUNTER_ENABLE_MASK … macro
Ddcn_2_1_0_sh_mask.h6924 #define MCIF_CONTROL__MCIF_MC_LATENCY_COUNTER_ENABLE_MASK … macro
Ddcn_3_2_1_sh_mask.h4569 #define MCIF_CONTROL__MCIF_MC_LATENCY_COUNTER_ENABLE_MASK … macro
Ddcn_1_0_sh_mask.h7519 #define MCIF_CONTROL__MCIF_MC_LATENCY_COUNTER_ENABLE_MASK … macro
Ddcn_3_1_5_sh_mask.h5274 #define MCIF_CONTROL__MCIF_MC_LATENCY_COUNTER_ENABLE_MASK … macro
Ddcn_3_1_2_sh_mask.h7334 #define MCIF_CONTROL__MCIF_MC_LATENCY_COUNTER_ENABLE_MASK … macro
Ddcn_3_0_2_sh_mask.h6736 #define MCIF_CONTROL__MCIF_MC_LATENCY_COUNTER_ENABLE_MASK … macro
Ddcn_3_1_4_sh_mask.h15058 #define MCIF_CONTROL__MCIF_MC_LATENCY_COUNTER_ENABLE_MASK … macro
Ddcn_3_1_6_sh_mask.h7991 #define MCIF_CONTROL__MCIF_MC_LATENCY_COUNTER_ENABLE_MASK … macro
Ddcn_3_0_0_sh_mask.h6840 #define MCIF_CONTROL__MCIF_MC_LATENCY_COUNTER_ENABLE_MASK … macro
Ddcn_2_0_0_sh_mask.h7192 #define MCIF_CONTROL__MCIF_MC_LATENCY_COUNTER_ENABLE_MASK … macro
Ddcn_3_2_0_sh_mask.h4568 #define MCIF_CONTROL__MCIF_MC_LATENCY_COUNTER_ENABLE_MASK … macro