Searched refs:LITTLE (Results 1 – 24 of 24) sorted by relevance
45 LITTLE, enumerator251 if (i2c->endianness == LITTLE) in xiic_setreg8()261 if (i2c->endianness == LITTLE) in xiic_getreg8()270 if (i2c->endianness == LITTLE) in xiic_setreg16()278 if (i2c->endianness == LITTLE) in xiic_setreg32()288 if (i2c->endianness == LITTLE) in xiic_getreg32()1297 i2c->endianness = LITTLE; in xiic_i2c_probe()
15 * booting cluster (big or LITTLE) is chosen by IROM code by reading17 * from the LITTLE: Cortex-A7.
14 * booting cluster (big or LITTLE) is chosen by IROM code by reading16 * from the LITTLE: Cortex-A7.
73 * 7 steps for LITTLE).
119 * and 800 MHz LITTLE (5 steps).135 * big (11 steps) and 600 MHz LITTLE (7 steps).
130 * 8 steps for LITTLE).
47 bool "Support for ARM big.LITTLE processors"54 Select this option to enable CPU idle driver for big.LITTLE based
27 Arm big.LITTLE systems are an example of both. The big CPUs are more28 performance-oriented than the LITTLE ones (more pipeline stages, bigger caches,29 smarter predictors, etc), and can usually reach higher OPPs than the LITTLE ones69 To draw the parallel with Arm big.LITTLE, CPU0 would be a big while CPU1 would70 be a LITTLE.
49 for 50% at 2GHz, nor is running 50% on a LITTLE CPU the same as running 50% on
19 EAS operates only on heterogeneous CPU topologies (such as Arm big.LITTLE)
62 heterogeneous systems (e.g. Arm big.LITTLE); the constraint will help bias the
26 EAS只在异构CPU拓扑结构（如Arm大小核，big.LITTLE）上运行。因为在这种情况下，
36 Arm大小核（big.LITTLE）系统是同时具有两种差异的一个例子。相较小核，大核面向性能（拥有更多的
305 on RTSM implementing big.LITTLE.324 with a TC2 (A15x2 A7x3) big.LITTLE core tile.
20 (e.g., ARM big.LITTLE systems) or maximum frequency at which CPUs can run
1065 for (multi-)cluster based systems, such as big.LITTLE based1078 bool "big.LITTLE support (Experimental)"1082 This option enables support selections for the big.LITTLE1086 bool "big.LITTLE switcher support"1090 The big.LITTLE "switcher" provides the core functionality to1092 and a cluster of A7's in a big.LITTLE system.1095 tristate "Simple big.LITTLE switcher user interface"1099 the big.LITTLE switcher core code. It is meant for
15 Some Armv9 SoCs suffer from a big.LITTLE misfeature where only a subset
138 On heterogeneous systems such as big.LITTLE, userspace PMU counter access can
194 use in ARM-based big.LITTLE platforms, with review and input gratefully
89 big.LITTLE platforms using SPC for power management.
170 * MSM8939 has a big.LITTLE heterogeneous computing architecture,172 * LITTLE cluster runs at 1.0-1.2GHz, and the big cluster runs181 /* LITTLE (efficiency) cluster */
805 Some big.LITTLE systems have I-Cache line size mismatch between806 LITTLE and big cores. Say Y here to enable a workaround for
166 LITTLE = 0, enumerator
5336 CPU FREQUENCY DRIVERS - VEXPRESS SPC ARM BIG LITTLE5400 CPUIDLE DRIVER - ARM BIG LITTLE
