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Searched refs:JH7110_STGCLK_PCIE1_AXI_MST0 (Results 1 – 2 of 2) sorted by relevance

/Linux-v6.6/include/dt-bindings/clock/
Dstarfive,jh7110-crg.h240 #define JH7110_STGCLK_PCIE1_AXI_MST0 11 macro
/Linux-v6.6/drivers/clk/starfive/
Dclk-starfive-jh7110-stg.c45 JH71X0_GATE(JH7110_STGCLK_PCIE1_AXI_MST0, "pcie1_axi_mst0", 0,