JH7110_STGCLK_PCIE0_AXI_MST0 (reference) in projects: Linux-v6.6

Searched refs:JH7110_STGCLK_PCIE0_AXI_MST0 (Results 1 – 2 of 2) sorted by relevance

/Linux-v6.6/include/dt-bindings/clock/
D	starfive,jh7110-crg.h	`237 #define JH7110_STGCLK_PCIE0_AXI_MST0 8 macro`
/Linux-v6.6/drivers/clk/starfive/
D	clk-starfive-jh7110-stg.c	`41 JH71X0_GATE(JH7110_STGCLK_PCIE0_AXI_MST0, "pcie0_axi_mst0", 0,`