| /Linux-v6.6/drivers/pinctrl/renesas/ |
| D | pfc-r8a77970.c | 115 #define GPSR2_1 F_(VI0_CLKENB, IP3_3_0)
188 #define IP3_3_0 FM(VI0_CLKENB) FM(MSIOF2_RXD) FM(RX3) FM(RD_WR_N) FM(HCTS3_N) F_(0, 0) F_(0, … macro
269 FM(IP0_3_0) IP0_3_0 FM(IP1_3_0) IP1_3_0 FM(IP2_3_0) IP2_3_0 FM(IP3_3_0) IP3_3_0 \
490 PINMUX_IPSR_GPSR(IP3_3_0, VI0_CLKENB),
491 PINMUX_IPSR_GPSR(IP3_3_0, MSIOF2_RXD),
492 PINMUX_IPSR_GPSR(IP3_3_0, RX3),
493 PINMUX_IPSR_GPSR(IP3_3_0, RD_WR_N),
494 PINMUX_IPSR_GPSR(IP3_3_0, HCTS3_N),
2270 IP3_3_0 ))
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| D | pfc-r8a77980.c | 130 #define GPSR2_1 F_(VI0_CLKENB, IP3_3_0)
222 #define IP3_3_0 FM(VI0_CLKENB) FM(MSIOF2_RXD) FM(RX3) FM(RD_WR_N) FM(HCTS3_N) F_(0, 0) F_(0, … macro
319 FM(IP0_3_0) IP0_3_0 FM(IP1_3_0) IP1_3_0 FM(IP2_3_0) IP2_3_0 FM(IP3_3_0) IP3_3_0 \
574 PINMUX_IPSR_GPSR(IP3_3_0, VI0_CLKENB),
575 PINMUX_IPSR_GPSR(IP3_3_0, MSIOF2_RXD),
576 PINMUX_IPSR_GPSR(IP3_3_0, RX3),
577 PINMUX_IPSR_GPSR(IP3_3_0, RD_WR_N),
578 PINMUX_IPSR_GPSR(IP3_3_0, HCTS3_N),
2724 IP3_3_0 ))
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| D | pfc-r8a77990.c | 109 #define GPSR1_1 F_(A1, IP3_3_0)
238 #define IP3_3_0 FM(A1) FM(IRQ1) FM(PWM3_A) FM(DU_DOTCLKIN1) FM(VI5_DATA0_A) FM(DU_DISP_CDE) F… macro
386 FM(IP0_3_0) IP0_3_0 FM(IP1_3_0) IP1_3_0 FM(IP2_3_0) IP2_3_0 FM(IP3_3_0) IP3_3_0 \
665 PINMUX_IPSR_GPSR(IP3_3_0, A1),
666 PINMUX_IPSR_GPSR(IP3_3_0, IRQ1),
667 PINMUX_IPSR_MSEL(IP3_3_0, PWM3_A, SEL_PWM3_0),
668 PINMUX_IPSR_GPSR(IP3_3_0, DU_DOTCLKIN1),
669 PINMUX_IPSR_MSEL(IP3_3_0, VI5_DATA0_A, SEL_VIN5_0),
670 PINMUX_IPSR_GPSR(IP3_3_0, DU_DISP_CDE),
671 PINMUX_IPSR_MSEL(IP3_3_0, SDA6_B, SEL_I2C6_1),
[all …]
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| D | pfc-r8a77995.c | 71 #define GPSR1_17 F_(DU_DR1, IP3_3_0)
234 #define IP3_3_0 FM(DU_DR1) FM(LCDOUT17) FM(TX4_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)… macro
360 FM(IP0_3_0) IP0_3_0 FM(IP1_3_0) IP1_3_0 FM(IP2_3_0) IP2_3_0 FM(IP3_3_0) IP3_3_0 \
630 PINMUX_IPSR_GPSR(IP3_3_0, DU_DR1),
631 PINMUX_IPSR_GPSR(IP3_3_0, LCDOUT17),
632 PINMUX_IPSR_MSEL(IP3_3_0, TX4_B, SEL_SCIF4_1),
2711 IP3_3_0 ))
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| D | pfc-r8a77470.c | 648 PINMUX_IPSR_GPSR(IP3_3_0, D14),
649 PINMUX_IPSR_GPSR(IP3_3_0, MSIOF2_SS1),
650 PINMUX_IPSR_MSEL(IP3_3_0, TX4_C, SEL_SCIF4_2),
651 PINMUX_IPSR_MSEL(IP3_3_0, CAN1_RX_B, SEL_CAN1_1),
652 PINMUX_IPSR_MSEL(IP3_3_0, AVB_AVTP_CAPTURE_A, SEL_AVB_0),
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| D | pfc-r8a77965.c | 123 #define GPSR1_9 F_(A9, IP3_3_0)
283 #define IP3_3_0 FM(A9) F_(0, 0) FM(MSIOF2_SCK_A) FM(CTS4_N_B) F_(0, 0) FM(VI5_VSYNC_N) F_(0, 0… macro
450 FM(IP0_3_0) IP0_3_0 FM(IP1_3_0) IP1_3_0 FM(IP2_3_0) IP2_3_0 FM(IP3_3_0) IP3_3_0 \
810 PINMUX_IPSR_GPSR(IP3_3_0, A9),
811 PINMUX_IPSR_MSEL(IP3_3_0, MSIOF2_SCK_A, SEL_MSIOF2_0),
812 PINMUX_IPSR_MSEL(IP3_3_0, CTS4_N_B, SEL_SCIF4_1),
813 PINMUX_IPSR_GPSR(IP3_3_0, VI5_VSYNC_N),
5581 IP3_3_0 ))
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| D | pfc-r8a77951.c | 118 #define GPSR1_9 F_(A9, IP3_3_0)
280 #define IP3_3_0 FM(A9) F_(0, 0) FM(MSIOF2_SCK_A) FM(CTS4_N_B) F_(0, 0) FM(VI5_VSYNC_N) F_(0, 0… macro
445 FM(IP0_3_0) IP0_3_0 FM(IP1_3_0) IP1_3_0 FM(IP2_3_0) IP2_3_0 FM(IP3_3_0) IP3_3_0 \
804 PINMUX_IPSR_GPSR(IP3_3_0, A9),
805 PINMUX_IPSR_MSEL(IP3_3_0, MSIOF2_SCK_A, SEL_MSIOF2_0),
806 PINMUX_IPSR_MSEL(IP3_3_0, CTS4_N_B, SEL_SCIF4_1),
807 PINMUX_IPSR_GPSR(IP3_3_0, VI5_VSYNC_N),
5385 IP3_3_0 ))
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| D | pfc-r8a7796.c | 123 #define GPSR1_9 F_(A9, IP3_3_0)
283 #define IP3_3_0 FM(A9) F_(0, 0) FM(MSIOF2_SCK_A) FM(CTS4_N_B) F_(0, 0) FM(VI5_VSYNC_N) F_(0, 0… macro
450 FM(IP0_3_0) IP0_3_0 FM(IP1_3_0) IP1_3_0 FM(IP2_3_0) IP2_3_0 FM(IP3_3_0) IP3_3_0 \
808 PINMUX_IPSR_GPSR(IP3_3_0, A9),
809 PINMUX_IPSR_MSEL(IP3_3_0, MSIOF2_SCK_A, SEL_MSIOF2_0),
810 PINMUX_IPSR_MSEL(IP3_3_0, CTS4_N_B, SEL_SCIF4_1),
811 PINMUX_IPSR_GPSR(IP3_3_0, VI5_VSYNC_N),
5340 IP3_3_0 ))
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| D | pfc-r8a7790.c | 952 PINMUX_IPSR_GPSR(IP3_3_0, A11),
953 PINMUX_IPSR_MSEL(IP3_3_0, SCIFB2_CTS_N_B, SEL_SCIFB2_1),
954 PINMUX_IPSR_GPSR(IP3_3_0, MSIOF2_SCK),
955 PINMUX_IPSR_MSEL(IP3_3_0, VI1_R0, SEL_VI1_0),
956 PINMUX_IPSR_MSEL(IP3_3_0, VI1_R0_B, SEL_VI1_1),
957 PINMUX_IPSR_GPSR(IP3_3_0, VI2_G0),
958 PINMUX_IPSR_MSEL(IP3_3_0, VI2_DATA3_VI2_B3_B, SEL_VI2_1),
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