Searched refs:GPIO_BASE (Results 1 – 8 of 8) sorted by relevance
31 OP___assert(GPIO_BASE[ID] != (hrt_address) - 1); in gpio_reg_store()32 ia_css_device_store_uint32(GPIO_BASE[ID] + reg * sizeof(hrt_data), value); in gpio_reg_store()41 OP___assert(GPIO_BASE[ID] != (hrt_address) - 1); in gpio_reg_load()42 return ia_css_device_load_uint32(GPIO_BASE[ID] + reg * sizeof(hrt_data)); in gpio_reg_load()
71 OP___assert(GPIO_BASE[GPIO_ID] != (hrt_address)-1); in timed_ctrl_snd_gpio_commnd()74 GPIO_BASE[GPIO_ID] + offset, value); in timed_ctrl_snd_gpio_commnd()
25 #define GPIO_BASE 0x44 macro148 ret = lpc_sch_populate_cell(dev, GPIO_BASE, "sch_gpio", in lpc_sch_probe()
42 #define GPIO_BASE(p) (REG_OFF * PORT(p)) macro43 #define GPIO_OUT(p) GPIO_BASE(p)44 #define GPIO_IN(p) (GPIO_BASE(p) + 0x04)45 #define GPIO_DIR(p) (GPIO_BASE(p) + 0x08)46 #define GPIO_ALT0(p) (GPIO_BASE(p) + 0x0C)47 #define GPIO_ALT1(p) (GPIO_BASE(p) + 0x10)48 #define GPIO_OD(p) (GPIO_BASE(p) + 0x14)49 #define GPIO_PUDSEL(p) (GPIO_BASE(p) + 0x1c)50 #define GPIO_PUDEN(p) (GPIO_BASE(p) + 0x20)53 #define GPIO3_OD (GPIO_BASE(0) + 0x24)[all …]
102 const hrt_address GPIO_BASE[N_GPIO_ID] = { variable
71 extern const hrt_address GPIO_BASE[N_GPIO_ID];
30 #define GPIO_BASE 0x048 macro371 status = pci_read_config_dword(dev, GPIO_BASE, &nas_gpio_io_base); in ich7_lpc_probe()
61 GPIO_BASE, enumerator
