1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * rt715-sdca.h -- RT715 ALSA SoC audio driver header 4 * 5 * Copyright(c) 2020 Realtek Semiconductor Corp. 6 */ 7 8 #ifndef __RT715_SDCA_H__ 9 #define __RT715_SDCA_H__ 10 11 #include <linux/regmap.h> 12 #include <linux/soundwire/sdw.h> 13 #include <linux/soundwire/sdw_type.h> 14 #include <sound/soc.h> 15 #include <linux/workqueue.h> 16 #include <linux/device.h> 17 18 struct rt715_sdca_priv { 19 struct regmap *regmap; 20 struct regmap *mbq_regmap; 21 struct snd_soc_codec *codec; 22 struct sdw_slave *slave; 23 struct delayed_work adc_mute_work; 24 int dbg_nid; 25 int dbg_vid; 26 int dbg_payload; 27 struct sdw_bus_params params; 28 bool hw_init; 29 bool first_hw_init; 30 int l_is_unmute; 31 int r_is_unmute; 32 int hw_sdw_ver; 33 int kctl_switch_orig[4]; 34 int kctl_2ch_orig[2]; 35 int kctl_4ch_orig[4]; 36 int kctl_8ch_orig[8]; 37 }; 38 39 struct rt715_sdca_kcontrol_private { 40 unsigned int reg_base; 41 unsigned int count; 42 unsigned int max; 43 unsigned int shift; 44 unsigned int invert; 45 }; 46 47 /* MIPI Register */ 48 #define RT715_INT_CTRL 0x005a 49 #define RT715_INT_MASK 0x005e 50 51 /* NID */ 52 #define RT715_AUDIO_FUNCTION_GROUP 0x01 53 #define RT715_MIC_ADC 0x07 54 #define RT715_LINE_ADC 0x08 55 #define RT715_MIX_ADC 0x09 56 #define RT715_DMIC1 0x12 57 #define RT715_DMIC2 0x13 58 #define RT715_MIC1 0x18 59 #define RT715_MIC2 0x19 60 #define RT715_LINE1 0x1a 61 #define RT715_LINE2 0x1b 62 #define RT715_DMIC3 0x1d 63 #define RT715_DMIC4 0x29 64 #define RT715_VENDOR_REG 0x20 65 #define RT715_MUX_IN1 0x22 66 #define RT715_MUX_IN2 0x23 67 #define RT715_MUX_IN3 0x24 68 #define RT715_MUX_IN4 0x25 69 #define RT715_MIX_ADC2 0x27 70 #define RT715_INLINE_CMD 0x55 71 #define RT715_VENDOR_HDA_CTL 0x61 72 73 /* Index (NID:20h) */ 74 #define RT715_PRODUCT_NUM 0x0 75 #define RT715_IRQ_CTRL 0x2b 76 #define RT715_AD_FUNC_EN 0x36 77 #define RT715_REV_1 0x37 78 #define RT715_SDW_INPUT_SEL 0x39 79 #define RT715_DFLL_VAD 0x44 80 #define RT715_EXT_DMIC_CLK_CTRL2 0x54 81 82 /* Index (NID:61h) */ 83 #define RT715_HDA_LEGACY_MUX_CTL1 0x00 84 85 /* SDCA (Function) */ 86 #define FUN_JACK_CODEC 0x01 87 #define FUN_MIC_ARRAY 0x02 88 #define FUN_HID 0x03 89 /* SDCA (Entity) */ 90 #define RT715_SDCA_ST_EN 0x00 91 #define RT715_SDCA_CS_FREQ_IND_EN 0x01 92 #define RT715_SDCA_FU_ADC8_9_VOL 0x02 93 #define RT715_SDCA_SMPU_TRIG_ST_EN 0x05 94 #define RT715_SDCA_FU_ADC10_11_VOL 0x06 95 #define RT715_SDCA_FU_ADC7_27_VOL 0x0a 96 #define RT715_SDCA_FU_AMIC_GAIN_EN 0x0c 97 #define RT715_SDCA_FU_DMIC_GAIN_EN 0x0e 98 #define RT715_SDCA_CX_CLK_SEL_EN 0x10 99 #define RT715_SDCA_CREQ_POW_EN 0x18 100 /* SDCA (Control) */ 101 #define RT715_SDCA_ST_CTRL 0x00 102 #define RT715_SDCA_CX_CLK_SEL_CTRL 0x01 103 #define RT715_SDCA_REQ_POW_CTRL 0x01 104 #define RT715_SDCA_FU_MUTE_CTRL 0x01 105 #define RT715_SDCA_FU_VOL_CTRL 0x02 106 #define RT715_SDCA_FU_DMIC_GAIN_CTRL 0x0b 107 #define RT715_SDCA_FREQ_IND_CTRL 0x10 108 #define RT715_SDCA_SMPU_TRIG_EN_CTRL 0x10 109 #define RT715_SDCA_SMPU_TRIG_ST_CTRL 0x11 110 /* SDCA (Channel) */ 111 #define CH_00 0x00 112 #define CH_01 0x01 113 #define CH_02 0x02 114 #define CH_03 0x03 115 #define CH_04 0x04 116 #define CH_05 0x05 117 #define CH_06 0x06 118 #define CH_07 0x07 119 #define CH_08 0x08 120 121 #define RT715_SDCA_DB_STEP 375 122 123 enum { 124 RT715_AIF1, 125 RT715_AIF2, 126 }; 127 128 int rt715_sdca_io_init(struct device *dev, struct sdw_slave *slave); 129 int rt715_sdca_init(struct device *dev, struct regmap *mbq_regmap, 130 struct regmap *regmap, struct sdw_slave *slave); 131 132 #endif /* __RT715_SDCA_H__ */ 133
