Searched refs:ERDMA_SQE_HDR_OPCODE_MASK (Results 1 – 2 of 2) sorted by relevance
329 wqe_hdr |= FIELD_PREP(ERDMA_SQE_HDR_OPCODE_MASK, hw_op); in erdma_push_one_sqe()356 wqe_hdr |= FIELD_PREP(ERDMA_SQE_HDR_OPCODE_MASK, hw_op); in erdma_push_one_sqe()387 wqe_hdr |= FIELD_PREP(ERDMA_SQE_HDR_OPCODE_MASK, hw_op); in erdma_push_one_sqe()395 FIELD_PREP(ERDMA_SQE_HDR_OPCODE_MASK, ERDMA_OP_REG_MR); in erdma_push_one_sqe()424 wqe_hdr |= FIELD_PREP(ERDMA_SQE_HDR_OPCODE_MASK, in erdma_push_one_sqe()434 wqe_hdr |= FIELD_PREP(ERDMA_SQE_HDR_OPCODE_MASK, in erdma_push_one_sqe()441 wqe_hdr |= FIELD_PREP(ERDMA_SQE_HDR_OPCODE_MASK, in erdma_push_one_sqe()
426 #define ERDMA_SQE_HDR_OPCODE_MASK GENMASK_ULL(31, 27) macro
