Searched refs:EDCIDSR (Results 1 – 2 of 2) sorted by relevance
38 sampling registers: EDPCSR, EDVIDSR and EDCIDSR: from EDPCSR we can get40 bit width, etc; EDCIDSR is context ID value which contains the sampled value187 coresight-cpu-debug 850000.debug: EDCIDSR: 00000000192 coresight-cpu-debug 852000.debug: EDCIDSR: 00000000
30 #define EDCIDSR 0x0A4 macro233 drvdata->edcidsr = readl_relaxed(drvdata->base + EDCIDSR); in debug_read_regs()
