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Searched refs:DSCC1_DSCC_PPS_CONFIG14__RC_BUF_THRESH9__SHIFT (Results 1 – 12 of 12) sorted by relevance

/Linux-v6.6/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_3_0_3_sh_mask.h22983 #define DSCC1_DSCC_PPS_CONFIG14__RC_BUF_THRESH9__SHIFT … macro
Ddcn_3_0_1_sh_mask.h38340 #define DSCC1_DSCC_PPS_CONFIG14__RC_BUF_THRESH9__SHIFT … macro
Ddcn_2_1_0_sh_mask.h45104 #define DSCC1_DSCC_PPS_CONFIG14__RC_BUF_THRESH9__SHIFT … macro
Ddcn_3_2_1_sh_mask.h42533 #define DSCC1_DSCC_PPS_CONFIG14__RC_BUF_THRESH9__SHIFT … macro
Ddcn_3_1_5_sh_mask.h45578 #define DSCC1_DSCC_PPS_CONFIG14__RC_BUF_THRESH9__SHIFT … macro
Ddcn_3_1_2_sh_mask.h47297 #define DSCC1_DSCC_PPS_CONFIG14__RC_BUF_THRESH9__SHIFT … macro
Ddcn_3_0_2_sh_mask.h44367 #define DSCC1_DSCC_PPS_CONFIG14__RC_BUF_THRESH9__SHIFT … macro
Ddcn_3_1_4_sh_mask.h49636 #define DSCC1_DSCC_PPS_CONFIG14__RC_BUF_THRESH9__SHIFT … macro
Ddcn_3_1_6_sh_mask.h48924 #define DSCC1_DSCC_PPS_CONFIG14__RC_BUF_THRESH9__SHIFT … macro
Ddcn_3_0_0_sh_mask.h51000 #define DSCC1_DSCC_PPS_CONFIG14__RC_BUF_THRESH9__SHIFT … macro
Ddcn_2_0_0_sh_mask.h51671 #define DSCC1_DSCC_PPS_CONFIG14__RC_BUF_THRESH9__SHIFT … macro
Ddcn_3_2_0_sh_mask.h42485 #define DSCC1_DSCC_PPS_CONFIG14__RC_BUF_THRESH9__SHIFT … macro