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Searched refs:DSCC1_DSCC_PPS_CONFIG12__RC_BUF_THRESH2__SHIFT (Results 1 – 12 of 12) sorted by relevance

/Linux-v6.6/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_3_0_3_sh_mask.h22966 #define DSCC1_DSCC_PPS_CONFIG12__RC_BUF_THRESH2__SHIFT … macro
Ddcn_3_0_1_sh_mask.h38323 #define DSCC1_DSCC_PPS_CONFIG12__RC_BUF_THRESH2__SHIFT … macro
Ddcn_2_1_0_sh_mask.h45087 #define DSCC1_DSCC_PPS_CONFIG12__RC_BUF_THRESH2__SHIFT … macro
Ddcn_3_2_1_sh_mask.h42516 #define DSCC1_DSCC_PPS_CONFIG12__RC_BUF_THRESH2__SHIFT … macro
Ddcn_3_1_5_sh_mask.h45561 #define DSCC1_DSCC_PPS_CONFIG12__RC_BUF_THRESH2__SHIFT … macro
Ddcn_3_1_2_sh_mask.h47280 #define DSCC1_DSCC_PPS_CONFIG12__RC_BUF_THRESH2__SHIFT … macro
Ddcn_3_0_2_sh_mask.h44350 #define DSCC1_DSCC_PPS_CONFIG12__RC_BUF_THRESH2__SHIFT … macro
Ddcn_3_1_4_sh_mask.h49619 #define DSCC1_DSCC_PPS_CONFIG12__RC_BUF_THRESH2__SHIFT … macro
Ddcn_3_1_6_sh_mask.h48907 #define DSCC1_DSCC_PPS_CONFIG12__RC_BUF_THRESH2__SHIFT … macro
Ddcn_3_0_0_sh_mask.h50983 #define DSCC1_DSCC_PPS_CONFIG12__RC_BUF_THRESH2__SHIFT … macro
Ddcn_2_0_0_sh_mask.h51654 #define DSCC1_DSCC_PPS_CONFIG12__RC_BUF_THRESH2__SHIFT … macro
Ddcn_3_2_0_sh_mask.h42468 #define DSCC1_DSCC_PPS_CONFIG12__RC_BUF_THRESH2__SHIFT … macro