Searched refs:DRAM (Results 1 – 25 of 82) sorted by relevance
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| /Linux-v6.6/Documentation/hid/ |
| D | amd-sfh-hid.rst | 60 on that allocates the DRAM address for each and every sensor and passes it to MP2-PCIe driver. On
72 2. Data transfer via DRAM.
77 the PCI layer. MP2 firmware writes the command output to the access DRAM memory which the client
78 layer has allocated. Firmware always writes minimum of 32 bytes into DRAM. So as a protocol driver
79 shall allocate minimum of 32 bytes DRAM space.
103 | | | Allocate the DRAM | Enable |
136 | | | Read the DRAM data for| | |
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| /Linux-v6.6/drivers/memory/tegra/ |
| D | Kconfig | 22 Tegra20 chips. The EMC controls the external DRAM on the board.
34 Tegra30 chips. The EMC controls the external DRAM on the board.
46 Tegra124 chips. The EMC controls the external DRAM on the board.
60 Tegra210 chips. The EMC controls the external DRAM on the board.
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| /Linux-v6.6/sound/isa/gus/ |
| D | gus_dram.c | 28 outsb(GUSP(gus, DRAM), buffer, size1); in snd_gus_dram_poke()
64 insb(GUSP(gus, DRAM), buffer, size1); in snd_gus_dram_peek()
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| /Linux-v6.6/Documentation/devicetree/bindings/firmware/ |
| D | nvidia,tegra210-bpmp.txt | 6 (suspend to ram), and also offloading DRAM memory clock scaling on
23 - #clock-cells : Should be 1 for platforms where DRAM clock control is
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| /Linux-v6.6/drivers/memory/samsung/ |
| D | Kconfig | 19 Frequency Scaling in DMC and DRAM. It also supports changing timings
20 of DRAM running with different frequency. The timings are calculated
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| /Linux-v6.6/Documentation/driver-api/ |
| D | edac.rst | 18 The individual DRAM chips on a memory stick. These devices commonly
69 This is the name of the DRAM signal used to select the DRAM ranks to be
112 communication lanes. It uses vertically stacked memory chips (DRAM dies)
202 of 4096-bits of DRAM data bus.
204 While the UMC is interfacing a 16GB (8high X 2GB DRAM) HBM stack, each UMC
205 channel is interfacing 2GB of DRAM (represented as rank).
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| /Linux-v6.6/arch/arm/configs/ |
| D | dram_0x00000000.config | 1 # Help: DRAM base at 0x00000000
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| D | dram_0xc0000000.config | 1 # Help: DRAM base at 0xc0000000
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| D | dram_0xd0000000.config | 1 # Help: DRAM base at 0xd0000000
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| /Linux-v6.6/arch/arm/ |
| D | Kconfig-nommu | 14 hex '(S)DRAM Base Address' if SET_MEM_PARAM
18 hex '(S)DRAM SIZE' if SET_MEM_PARAM
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| /Linux-v6.6/Documentation/admin-guide/perf/ |
| D | meson-ddr-pmu.rst | 7 The Amlogic Meson G12 SoC contains a bandwidth monitor inside DRAM controller.
9 DRAM. The channel can count up to 3 AXI port simultaneously. It can be helpful
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| D | imx-ddr.rst | 5 There are no performance counters inside the DRAM controller, so performance
30 from different DRAM controller implementations, which is distinguished by quirks
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| /Linux-v6.6/Documentation/translations/zh_CN/mm/damon/ |
| D | index.rst | 19 - *准确度* （监测输出对DRAM级别的内存管理足够有用；但可能不适合CPU Cache级别），
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| /Linux-v6.6/Documentation/hwmon/ |
| D | asus_wmi_sensors.rst | 37 * DRAM Voltage,
48 * DRAM Voltage,
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| /Linux-v6.6/arch/arm64/boot/dts/broadcom/stingray/ |
| D | stingray-board-base.dtsi | 22 &memory { /* Default DRAM banks */
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| /Linux-v6.6/arch/arm/mach-lpc32xx/ |
| D | suspend.S | 51 @ This guarantees a small windows where DRAM isn't busy
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| /Linux-v6.6/arch/arm64/boot/dts/nuvoton/ |
| D | ma35d1-iot-512m.dts | 25 reg = <0x00000000 0x80000000 0 0x20000000>; /* 512M DRAM */
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| D | ma35d1-som-256m.dts | 25 reg = <0x00000000 0x80000000 0 0x10000000>; /* 256M DRAM */
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| /Linux-v6.6/Documentation/arch/arm/sa1100/ |
| D | lart.rst | 6 applications. It has 32 MB DRAM, 4MB Flash ROM, double RS232 and all
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| /Linux-v6.6/drivers/powercap/ |
| D | Kconfig | 34 fine grained control. These domains include processor package, DRAM
49 fine grained control. These domains include processor package, DRAM
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| /Linux-v6.6/Documentation/arch/x86/ |
| D | amd-memory-encryption.rst | 12 automatically decrypted when read from DRAM and encrypted when written to
13 DRAM. SME can therefore be used to protect the contents of DRAM from physical
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| /Linux-v6.6/arch/x86/ras/ |
| D | Kconfig | 13 have ECC DIMMs and doesn't have DRAM ECC checking enabled in the BIOS.
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| /Linux-v6.6/Documentation/mm/damon/ |
| D | index.rst | 11 - *accurate* (the monitoring output is useful enough for DRAM level memory
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| /Linux-v6.6/drivers/edac/ |
| D | Kconfig | 82 Support for error detection and correction of DRAM ECC errors on
91 Correctable errors into DRAM.
101 which trigger the DRAM ECC Read and Write respectively.
172 E3-1200 based DRAM controllers.
378 tristate "Cavium Octeon DRAM Memory Controller (LMC)"
543 SoCs with ARM DMC-520 DRAM controller.
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| /Linux-v6.6/arch/arm/boot/dts/synaptics/ |
| D | berlin2cd-valve-steamlink.dts | 43 * DRAM (providing 1.35V). The other regulator on the opposite side
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