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Searched refs:DPP_TOP0_DPP_CONTROL__DPP_CLOCK_ENABLE__SHIFT (Results 1 – 14 of 14) sorted by relevance

/Linux-v6.6/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_2_0_3_sh_mask.h3933 #define DPP_TOP0_DPP_CONTROL__DPP_CLOCK_ENABLE__SHIFT … macro
Ddcn_3_0_3_sh_mask.h9104 #define DPP_TOP0_DPP_CONTROL__DPP_CLOCK_ENABLE__SHIFT … macro
Ddcn_3_0_1_sh_mask.h12780 #define DPP_TOP0_DPP_CONTROL__DPP_CLOCK_ENABLE__SHIFT … macro
Ddcn_2_1_0_sh_mask.h12736 #define DPP_TOP0_DPP_CONTROL__DPP_CLOCK_ENABLE__SHIFT … macro
Ddcn_3_2_1_sh_mask.h11554 #define DPP_TOP0_DPP_CONTROL__DPP_CLOCK_ENABLE__SHIFT … macro
Ddcn_1_0_sh_mask.h12662 #define DPP_TOP0_DPP_CONTROL__DPP_CLOCK_ENABLE__SHIFT … macro
Ddcn_3_1_5_sh_mask.h13709 #define DPP_TOP0_DPP_CONTROL__DPP_CLOCK_ENABLE__SHIFT … macro
Ddcn_3_1_2_sh_mask.h15704 #define DPP_TOP0_DPP_CONTROL__DPP_CLOCK_ENABLE__SHIFT … macro
Ddcn_3_0_2_sh_mask.h13621 #define DPP_TOP0_DPP_CONTROL__DPP_CLOCK_ENABLE__SHIFT … macro
Ddcn_3_1_4_sh_mask.h21006 #define DPP_TOP0_DPP_CONTROL__DPP_CLOCK_ENABLE__SHIFT … macro
Ddcn_3_1_6_sh_mask.h16450 #define DPP_TOP0_DPP_CONTROL__DPP_CLOCK_ENABLE__SHIFT … macro
Ddcn_3_0_0_sh_mask.h14687 #define DPP_TOP0_DPP_CONTROL__DPP_CLOCK_ENABLE__SHIFT … macro
Ddcn_2_0_0_sh_mask.h15804 #define DPP_TOP0_DPP_CONTROL__DPP_CLOCK_ENABLE__SHIFT … macro
Ddcn_3_2_0_sh_mask.h11551 #define DPP_TOP0_DPP_CONTROL__DPP_CLOCK_ENABLE__SHIFT … macro