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Searched refs:DMCU_IRAM_WR_CTRL__IRAM_WR_ADDR__SHIFT (Results 1 – 17 of 17) sorted by relevance

/Linux-v6.6/drivers/gpu/drm/amd/include/asic_reg/dce/
Ddce_6_0_sh_mask.h5948 #define DMCU_IRAM_WR_CTRL__IRAM_WR_ADDR__SHIFT 0x00000000 macro
Ddce_8_0_sh_mask.h7770 #define DMCU_IRAM_WR_CTRL__IRAM_WR_ADDR__SHIFT 0x0 macro
Ddce_10_0_sh_mask.h6814 #define DMCU_IRAM_WR_CTRL__IRAM_WR_ADDR__SHIFT 0x0 macro
Ddce_11_0_sh_mask.h6708 #define DMCU_IRAM_WR_CTRL__IRAM_WR_ADDR__SHIFT 0x0 macro
Ddce_11_2_sh_mask.h7788 #define DMCU_IRAM_WR_CTRL__IRAM_WR_ADDR__SHIFT 0x0 macro
Ddce_12_0_sh_mask.h4724 #define DMCU_IRAM_WR_CTRL__IRAM_WR_ADDR__SHIFT … macro
/Linux-v6.6/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_3_0_3_sh_mask.h1402 #define DMCU_IRAM_WR_CTRL__IRAM_WR_ADDR__SHIFT … macro
Ddcn_3_0_1_sh_mask.h2345 #define DMCU_IRAM_WR_CTRL__IRAM_WR_ADDR__SHIFT … macro
Ddcn_2_1_0_sh_mask.h2200 #define DMCU_IRAM_WR_CTRL__IRAM_WR_ADDR__SHIFT … macro
Ddcn_1_0_sh_mask.h3694 #define DMCU_IRAM_WR_CTRL__IRAM_WR_ADDR__SHIFT … macro
Ddcn_3_1_5_sh_mask.h1336 #define DMCU_IRAM_WR_CTRL__IRAM_WR_ADDR__SHIFT … macro
Ddcn_3_1_2_sh_mask.h1825 #define DMCU_IRAM_WR_CTRL__IRAM_WR_ADDR__SHIFT … macro
Ddcn_3_0_2_sh_mask.h2271 #define DMCU_IRAM_WR_CTRL__IRAM_WR_ADDR__SHIFT … macro
Ddcn_3_1_4_sh_mask.h10455 #define DMCU_IRAM_WR_CTRL__IRAM_WR_ADDR__SHIFT … macro
Ddcn_3_1_6_sh_mask.h2392 #define DMCU_IRAM_WR_CTRL__IRAM_WR_ADDR__SHIFT … macro
Ddcn_3_0_0_sh_mask.h2338 #define DMCU_IRAM_WR_CTRL__IRAM_WR_ADDR__SHIFT … macro
Ddcn_2_0_0_sh_mask.h2468 #define DMCU_IRAM_WR_CTRL__IRAM_WR_ADDR__SHIFT … macro