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Searched refs:DMCU_INTERRUPT_STATUS__VBLANK5_INT_CLEAR_MASK (Results 1 – 16 of 16) sorted by relevance

/Linux-v6.6/drivers/gpu/drm/amd/include/asic_reg/dce/
Ddce_6_0_sh_mask.h5807 #define DMCU_INTERRUPT_STATUS__VBLANK5_INT_CLEAR_MASK 0x10000000L macro
Ddce_8_0_sh_mask.h7969 #define DMCU_INTERRUPT_STATUS__VBLANK5_INT_CLEAR_MASK 0x10000000 macro
Ddce_10_0_sh_mask.h6997 #define DMCU_INTERRUPT_STATUS__VBLANK5_INT_CLEAR_MASK 0x10000000 macro
Ddce_11_0_sh_mask.h6899 #define DMCU_INTERRUPT_STATUS__VBLANK5_INT_CLEAR_MASK 0x10000000 macro
Ddce_11_2_sh_mask.h7971 #define DMCU_INTERRUPT_STATUS__VBLANK5_INT_CLEAR_MASK 0x10000000 macro
Ddce_12_0_sh_mask.h4918 #define DMCU_INTERRUPT_STATUS__VBLANK5_INT_CLEAR_MASK … macro
/Linux-v6.6/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_3_0_3_sh_mask.h1540 #define DMCU_INTERRUPT_STATUS__VBLANK5_INT_CLEAR_MASK … macro
Ddcn_3_0_1_sh_mask.h2527 #define DMCU_INTERRUPT_STATUS__VBLANK5_INT_CLEAR_MASK … macro
Ddcn_2_1_0_sh_mask.h2386 #define DMCU_INTERRUPT_STATUS__VBLANK5_INT_CLEAR_MASK … macro
Ddcn_1_0_sh_mask.h3880 #define DMCU_INTERRUPT_STATUS__VBLANK5_INT_CLEAR_MASK … macro
Ddcn_3_1_2_sh_mask.h2011 #define DMCU_INTERRUPT_STATUS__VBLANK5_INT_CLEAR_MASK … macro
Ddcn_3_0_2_sh_mask.h2457 #define DMCU_INTERRUPT_STATUS__VBLANK5_INT_CLEAR_MASK … macro
Ddcn_3_1_4_sh_mask.h10641 #define DMCU_INTERRUPT_STATUS__VBLANK5_INT_CLEAR_MASK … macro
Ddcn_3_1_6_sh_mask.h2578 #define DMCU_INTERRUPT_STATUS__VBLANK5_INT_CLEAR_MASK … macro
Ddcn_3_0_0_sh_mask.h2524 #define DMCU_INTERRUPT_STATUS__VBLANK5_INT_CLEAR_MASK … macro
Ddcn_2_0_0_sh_mask.h2654 #define DMCU_INTERRUPT_STATUS__VBLANK5_INT_CLEAR_MASK … macro