Searched refs:DMA_ATTR_WEAK_ORDERING (Results 1 – 18 of 18) sorted by relevance
8 #define STMMAC_RX_DMA_ATTR (DMA_ATTR_SKIP_CPU_SYNC | DMA_ATTR_WEAK_ORDERING)
8 DMA_ATTR_WEAK_ORDERING section in DMA attributes11 DMA_ATTR_WEAK_ORDERING specifies that reads and writes to the mapping14 Since it is optional for platforms to implement DMA_ATTR_WEAK_ORDERING,
242 dma_attr |= DMA_ATTR_WEAK_ORDERING; in ib_umem_get()
103 (DMA_ATTR_SKIP_CPU_SYNC | DMA_ATTR_WEAK_ORDERING)
139 (DMA_ATTR_SKIP_CPU_SYNC | DMA_ATTR_WEAK_ORDERING)
116 (DMA_ATTR_SKIP_CPU_SYNC | DMA_ATTR_WEAK_ORDERING)
358 DMA_ATTR_WEAK_ORDERING); in page_pool_dma_map()526 DMA_ATTR_SKIP_CPU_SYNC | DMA_ATTR_WEAK_ORDERING); in page_pool_return_page()
202 if (attrs & DMA_ATTR_WEAK_ORDERING) in dma_4v_alloc_coherent()399 if (attrs & DMA_ATTR_WEAK_ORDERING) in dma_4v_map_page()497 if (attrs & DMA_ATTR_WEAK_ORDERING) in dma_4v_map_sg()
317 (DMA_ATTR_SKIP_CPU_SYNC | DMA_ATTR_WEAK_ORDERING)
426 (DMA_ATTR_SKIP_CPU_SYNC | DMA_ATTR_WEAK_ORDERING)
311 DMA_ATTR_WEAK_ORDERING); in bnxt_rx_xdp()
795 DMA_ATTR_WEAK_ORDERING); in __bnxt_alloc_rx_frag()1074 bp->rx_dir, DMA_ATTR_WEAK_ORDERING); in bnxt_rx_skb()1683 DMA_ATTR_WEAK_ORDERING); in bnxt_tpa_end()2927 DMA_ATTR_WEAK_ORDERING); in bnxt_free_one_rx_ring_skbs()2952 DMA_ATTR_WEAK_ORDERING); in bnxt_free_one_rx_ring_skbs()
207 (DMA_ATTR_SKIP_CPU_SYNC | DMA_ATTR_WEAK_ORDERING)
598 imem->attrs = DMA_ATTR_WEAK_ORDERING | in gk20a_instmem_new()
24 #define DMA_ATTR_WEAK_ORDERING (1UL << 1) macro
1521 DMA_ATTR_SKIP_CPU_SYNC | DMA_ATTR_WEAK_ORDERING); in gve_xsk_pool_enable()1552 DMA_ATTR_SKIP_CPU_SYNC | DMA_ATTR_WEAK_ORDERING); in gve_xsk_pool_enable()1604 DMA_ATTR_SKIP_CPU_SYNC | DMA_ATTR_WEAK_ORDERING); in gve_xsk_pool_disable()
185 if (unlikely(attrs & DMA_ATTR_WEAK_ORDERING)) in tce_build_cell()
143 (DMA_ATTR_SKIP_CPU_SYNC | DMA_ATTR_WEAK_ORDERING)
