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Searched refs:DISP_INTERRUPT_STATUS__DC_HPD1_RX_INTERRUPT_MASK (Results 1 – 19 of 19) sorted by relevance

/Linux-v6.6/drivers/gpu/drm/amd/include/asic_reg/dce/
Ddce_6_0_sh_mask.h5609 #define DISP_INTERRUPT_STATUS__DC_HPD1_RX_INTERRUPT_MASK 0x00040000L macro
Ddce_8_0_sh_mask.h6911 #define DISP_INTERRUPT_STATUS__DC_HPD1_RX_INTERRUPT_MASK 0x40000 macro
Ddce_10_0_sh_mask.h14908 #define DISP_INTERRUPT_STATUS__DC_HPD1_RX_INTERRUPT_MASK 0x40000 macro
Ddce_11_0_sh_mask.h15056 #define DISP_INTERRUPT_STATUS__DC_HPD1_RX_INTERRUPT_MASK 0x40000 macro
Ddce_11_2_sh_mask.h15718 #define DISP_INTERRUPT_STATUS__DC_HPD1_RX_INTERRUPT_MASK 0x40000 macro
Ddce_12_0_sh_mask.h8003 #define DISP_INTERRUPT_STATUS__DC_HPD1_RX_INTERRUPT_MASK … macro
/Linux-v6.6/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_2_0_3_sh_mask.h494 #define DISP_INTERRUPT_STATUS__DC_HPD1_RX_INTERRUPT_MASK … macro
Ddcn_3_0_3_sh_mask.h2545 #define DISP_INTERRUPT_STATUS__DC_HPD1_RX_INTERRUPT_MASK … macro
Ddcn_3_0_1_sh_mask.h3910 #define DISP_INTERRUPT_STATUS__DC_HPD1_RX_INTERRUPT_MASK … macro
Ddcn_2_1_0_sh_mask.h3696 #define DISP_INTERRUPT_STATUS__DC_HPD1_RX_INTERRUPT_MASK … macro
Ddcn_3_2_1_sh_mask.h1194 #define DISP_INTERRUPT_STATUS__DC_HPD1_RX_INTERRUPT_MASK … macro
Ddcn_1_0_sh_mask.h4978 #define DISP_INTERRUPT_STATUS__DC_HPD1_RX_INTERRUPT_MASK … macro
Ddcn_3_1_2_sh_mask.h3668 #define DISP_INTERRUPT_STATUS__DC_HPD1_RX_INTERRUPT_MASK … macro
Ddcn_3_0_2_sh_mask.h3877 #define DISP_INTERRUPT_STATUS__DC_HPD1_RX_INTERRUPT_MASK … macro
Ddcn_3_1_4_sh_mask.h12033 #define DISP_INTERRUPT_STATUS__DC_HPD1_RX_INTERRUPT_MASK … macro
Ddcn_3_1_6_sh_mask.h4237 #define DISP_INTERRUPT_STATUS__DC_HPD1_RX_INTERRUPT_MASK … macro
Ddcn_3_0_0_sh_mask.h3981 #define DISP_INTERRUPT_STATUS__DC_HPD1_RX_INTERRUPT_MASK … macro
Ddcn_2_0_0_sh_mask.h3964 #define DISP_INTERRUPT_STATUS__DC_HPD1_RX_INTERRUPT_MASK … macro
Ddcn_3_2_0_sh_mask.h1196 #define DISP_INTERRUPT_STATUS__DC_HPD1_RX_INTERRUPT_MASK … macro