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Searched refs:DISP_INTERRUPT_STATUS_CONTINUE4__DC_HPD5_INTERRUPT_MASK (Results 1 – 23 of 23) sorted by relevance

/Linux-v6.6/drivers/gpu/drm/amd/amdgpu/
Dsid.h2071 #define DISP_INTERRUPT_STATUS_CONTINUE4__DC_HPD5_INTERRUPT_MASK 0x20000 macro
Ddce_v6_0.c119 .hpd = DISP_INTERRUPT_STATUS_CONTINUE4__DC_HPD5_INTERRUPT_MASK
Ddce_v8_0.c114 .hpd = DISP_INTERRUPT_STATUS_CONTINUE4__DC_HPD5_INTERRUPT_MASK
Ddce_v10_0.c114 .hpd = DISP_INTERRUPT_STATUS_CONTINUE4__DC_HPD5_INTERRUPT_MASK
Ddce_v11_0.c118 .hpd = DISP_INTERRUPT_STATUS_CONTINUE4__DC_HPD5_INTERRUPT_MASK
/Linux-v6.6/drivers/gpu/drm/amd/include/asic_reg/dce/
Ddce_6_0_sh_mask.h5505 #define DISP_INTERRUPT_STATUS_CONTINUE4__DC_HPD5_INTERRUPT_MASK 0x00020000L macro
Ddce_8_0_sh_mask.h7129 #define DISP_INTERRUPT_STATUS_CONTINUE4__DC_HPD5_INTERRUPT_MASK 0x20000 macro
Ddce_10_0_sh_mask.h15124 #define DISP_INTERRUPT_STATUS_CONTINUE4__DC_HPD5_INTERRUPT_MASK 0x20000 macro
Ddce_11_0_sh_mask.h15272 #define DISP_INTERRUPT_STATUS_CONTINUE4__DC_HPD5_INTERRUPT_MASK 0x20000 macro
Ddce_11_2_sh_mask.h15934 #define DISP_INTERRUPT_STATUS_CONTINUE4__DC_HPD5_INTERRUPT_MASK 0x20000 macro
Ddce_12_0_sh_mask.h8221 #define DISP_INTERRUPT_STATUS_CONTINUE4__DC_HPD5_INTERRUPT_MASK … macro
/Linux-v6.6/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_3_0_3_sh_mask.h2700 #define DISP_INTERRUPT_STATUS_CONTINUE4__DC_HPD5_INTERRUPT_MASK … macro
Ddcn_3_0_1_sh_mask.h4065 #define DISP_INTERRUPT_STATUS_CONTINUE4__DC_HPD5_INTERRUPT_MASK … macro
Ddcn_2_1_0_sh_mask.h3878 #define DISP_INTERRUPT_STATUS_CONTINUE4__DC_HPD5_INTERRUPT_MASK … macro
Ddcn_3_2_1_sh_mask.h1345 #define DISP_INTERRUPT_STATUS_CONTINUE4__DC_HPD5_INTERRUPT_MASK … macro
Ddcn_1_0_sh_mask.h5159 #define DISP_INTERRUPT_STATUS_CONTINUE4__DC_HPD5_INTERRUPT_MASK … macro
Ddcn_3_1_2_sh_mask.h3823 #define DISP_INTERRUPT_STATUS_CONTINUE4__DC_HPD5_INTERRUPT_MASK … macro
Ddcn_3_0_2_sh_mask.h4032 #define DISP_INTERRUPT_STATUS_CONTINUE4__DC_HPD5_INTERRUPT_MASK … macro
Ddcn_3_1_4_sh_mask.h12189 #define DISP_INTERRUPT_STATUS_CONTINUE4__DC_HPD5_INTERRUPT_MASK … macro
Ddcn_3_1_6_sh_mask.h4392 #define DISP_INTERRUPT_STATUS_CONTINUE4__DC_HPD5_INTERRUPT_MASK … macro
Ddcn_3_0_0_sh_mask.h4136 #define DISP_INTERRUPT_STATUS_CONTINUE4__DC_HPD5_INTERRUPT_MASK … macro
Ddcn_2_0_0_sh_mask.h4146 #define DISP_INTERRUPT_STATUS_CONTINUE4__DC_HPD5_INTERRUPT_MASK … macro
Ddcn_3_2_0_sh_mask.h1347 #define DISP_INTERRUPT_STATUS_CONTINUE4__DC_HPD5_INTERRUPT_MASK … macro