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Searched refs:DISP_CC_MDSS_VSYNC_CLK_SRC (Results 1 – 25 of 26) sorted by relevance

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/Linux-v6.6/include/dt-bindings/clock/
Dqcom,sm6115-dispcc.h29 #define DISP_CC_MDSS_VSYNC_CLK_SRC 19 macro
Dqcom,dispcc-qcm2290.h26 #define DISP_CC_MDSS_VSYNC_CLK_SRC 16 macro
Dqcom,sm6375-dispcc.h31 #define DISP_CC_MDSS_VSYNC_CLK_SRC 20 macro
Dqcom,dispcc-sm6125.h35 #define DISP_CC_MDSS_VSYNC_CLK_SRC 26 macro
Dqcom,dispcc-sc7180.h40 #define DISP_CC_MDSS_VSYNC_CLK_SRC 31 macro
Dqcom,dispcc-sm6350.h41 #define DISP_CC_MDSS_VSYNC_CLK_SRC 30 macro
Dqcom,dispcc-sdm845.h34 #define DISP_CC_MDSS_VSYNC_CLK_SRC 24 macro
Dqcom,dispcc-sc7280.h48 #define DISP_CC_MDSS_VSYNC_CLK_SRC 38 macro
Dqcom,dispcc-sm8150.h55 #define DISP_CC_MDSS_VSYNC_CLK_SRC 45 macro
Dqcom,dispcc-sm8250.h55 #define DISP_CC_MDSS_VSYNC_CLK_SRC 45 macro
Dqcom,dispcc-sm8350.h55 #define DISP_CC_MDSS_VSYNC_CLK_SRC 45 macro
Dqcom,dispcc-sc8280xp.h86 #define DISP_CC_MDSS_VSYNC_CLK_SRC 76 macro
Dqcom,sm8450-dispcc.h86 #define DISP_CC_MDSS_VSYNC_CLK_SRC 76 macro
Dqcom,sm8550-dispcc.h84 #define DISP_CC_MDSS_VSYNC_CLK_SRC 74 macro
/Linux-v6.6/drivers/clk/qcom/
Ddispcc-qcm2290.c481 [DISP_CC_MDSS_VSYNC_CLK_SRC] = &disp_cc_mdss_vsync_clk_src.clkr,
Ddispcc-sm6375.c537 [DISP_CC_MDSS_VSYNC_CLK_SRC] = &disp_cc_mdss_vsync_clk_src.clkr,
Ddispcc-sm6115.c548 [DISP_CC_MDSS_VSYNC_CLK_SRC] = &disp_cc_mdss_vsync_clk_src.clkr,
Ddispcc-sc7180.c672 [DISP_CC_MDSS_VSYNC_CLK_SRC] = &disp_cc_mdss_vsync_clk_src.clkr,
Ddispcc-sm6125.c644 [DISP_CC_MDSS_VSYNC_CLK_SRC] = &disp_cc_mdss_vsync_clk_src.clkr,
Ddispcc-sm6350.c731 [DISP_CC_MDSS_VSYNC_CLK_SRC] = &disp_cc_mdss_vsync_clk_src.clkr,
Ddispcc-sdm845.c811 [DISP_CC_MDSS_VSYNC_CLK_SRC] = &disp_cc_mdss_vsync_clk_src.clkr,
Ddispcc-sc7280.c840 [DISP_CC_MDSS_VSYNC_CLK_SRC] = &disp_cc_mdss_vsync_clk_src.clkr,
Ddispcc-sm8250.c1213 [DISP_CC_MDSS_VSYNC_CLK_SRC] = &disp_cc_mdss_vsync_clk_src.clkr,
Ddispcc-sc8280xp.c2955 [DISP_CC_MDSS_VSYNC_CLK_SRC] = &disp0_cc_mdss_vsync_clk_src.clkr,
3037 [DISP_CC_MDSS_VSYNC_CLK_SRC] = &disp1_cc_mdss_vsync_clk_src.clkr,
Ddispcc-sm8450.c1722 [DISP_CC_MDSS_VSYNC_CLK_SRC] = &disp_cc_mdss_vsync_clk_src.clkr,

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