| /Linux-v6.6/Documentation/devicetree/bindings/mips/brcm/ |
| D | soc.txt | 45 independently (control registers, DDR PHYs, etc.). One might consider
58 the entire memory controller (including all sub nodes: DDR PHY,
86 == DDR PHY control
88 Control registers for this memory controller's DDR PHY.
95 - reg : the DDR PHY register range and length
104 == DDR memory controller sequencer
106 Control registers for this memory controller's DDR memory sequencer
115 - reg : the DDR sequencer register range and length
136 - reg : the DDR Arbiter register range and length
|
| /Linux-v6.6/Documentation/driver-api/thermal/ |
| D | intel_dptf.rst | 188 DDR (Double Data Rate) and DLVR (Digital Linear Voltage Regulator)
209 DRAM devices of DDR IO interface and their power plane can generate EMI
211 mechanism by which DDR data rates can be changed if several conditions
212 are met: there is strong RFI interference because of DDR; CPU power
213 management has no other restriction in changing DDR data rates;
214 PC ODMs enable this feature (real time DDR RFI Mitigation referred to as
215 DDR-RFIM) for Wi-Fi from BIOS.
249 Request the restriction of specific DDR data rate and set this
257 Restricted DDR data rate for RFI protection: Lower Limit
260 Restricted DDR data rate for RFI protection: Upper Limit
[all …]
|
| /Linux-v6.6/Documentation/admin-guide/perf/ |
| D | meson-ddr-pmu.rst | 4 Amlogic SoC DDR Bandwidth Performance Monitoring Unit (PMU)
10 to show if the performance bottleneck is on DDR bandwidth.
24 Below are DDR access request event filter keywords:
55 + Show the total DDR bandwidth per seconds:
62 + Show individual DDR bandwidth from CPU and GPU respectively, as well as
|
| D | alibaba_pmu.rst | 9 DDR Sub-System Driveway (DRW) PMU Driver
14 channel is split into two independent sub-channels. The DDR Sub-System Driveway
43 The DDR Controller (DDRCTL) and DDR PHY combine to create a complete solution
44 for connecting an SoC application bus to DDR memory devices. The DDRCTL
49 the DDR PHY Interface (DFI) to the PHY module, which launches and captures data
|
| D | imx-ddr.rst | 2 Freescale i.MX8 DDR Performance Monitoring Unit (PMU)
21 in DDR PMU, see /sys/bus/events_source/devices/imx8_ddr0/caps/.
70 counting the number of bytes (as opposed to the number of bursts) from DDR
|
| /Linux-v6.6/Documentation/ABI/testing/ |
| D | sysfs-driver-bd9571mwv-regulator | 5 Description: Read/write the current state of DDR Backup Mode, which controls
6 if DDR power rails will be kept powered during system suspend.
10 A. With a momentary power switch (or pulse signal), DDR
26 DDR Backup Mode must be explicitly enabled by the user,
|
| D | sysfs-platform-brcmstb-memc | 7 internal DDR controller clock cycles. Possible values range
15 DDR PHY frequency in Hz.
|
| /Linux-v6.6/Documentation/devicetree/bindings/clock/ |
| D | mvebu-core-clock.txt | 12 4 = dramclk (DDR clock)
18 3 = ddrclk (DDR clock)
24 3 = ddrclk (DDR clock)
37 2 = ddrclk (DDR clock)
44 3 = ddrclk (DDR controller clock derived from CPU0 clock)
49 2 = ddrclk (DDR controller clock derived from CPU0 clock)
|
| D | brcm,bcm2835-cprman.txt | 27 - DSI0 DDR clock
30 - DSI1 DDR clock
|
| D | armada3700-periph-clock.txt | 26 11 ddr_phy DDR PHY
27 12 ddr_fclk DDR F clock
|
| /Linux-v6.6/drivers/gpio/ |
| D | gpio-mb86s7x.c | 31 #define DDR(x) (0x10 + x / 8 * 4) macro
83 val = readl(gchip->base + DDR(gpio)); in mb86s70_gpio_direction_input()
85 writel(val, gchip->base + DDR(gpio)); in mb86s70_gpio_direction_input()
108 val = readl(gchip->base + DDR(gpio)); in mb86s70_gpio_direction_output()
110 writel(val, gchip->base + DDR(gpio)); in mb86s70_gpio_direction_output()
|
| /Linux-v6.6/Documentation/devicetree/bindings/arm/bcm/ |
| D | brcm,brcmstb.txt | 148 independently (control registers, DDR PHYs, etc.). One might consider
163 == DDR PHY control
165 Control registers for this memory controller's DDR PHY.
175 - reg : the DDR PHY register range
177 == DDR SHIMPHY
179 Control registers for this memory controller's DDR SHIMPHY.
183 - reg : the DDR SHIMPHY register range
185 == MEMC DDR control
|
| /Linux-v6.6/drivers/perf/amlogic/ |
| D | Kconfig | 3 tristate "Amlogic DDR Bandwidth Performance Monitor"
6 Provides support for the DDR performance monitor
|
| /Linux-v6.6/drivers/perf/ |
| D | Kconfig | 123 tristate "Freescale i.MX8 DDR perf monitor"
126 Provides support for the DDR performance monitor in i.MX8, which
131 tristate "Freescale i.MX9 DDR perf monitor"
134 Provides support for the DDR performance monitor in i.MX9, which
205 tristate "Alibaba T-Head Yitian 710 DDR Sub-system Driveway PMU driver"
208 Support for Driveway PMU events monitoring on Yitian 710 DDR
217 Enable perf support for Marvell DDR Performance monitoring
|
| /Linux-v6.6/drivers/mtd/lpddr/ |
| D | Kconfig | 10 flash chips. Synonymous with Mobile-DDR. It is a new standard for
11 DDR memories, intended for battery-operated systems.
|
| /Linux-v6.6/arch/arm/mach-omap2/ |
| D | sleep24xx.S | 55 mcr p15, 0, r3, c7, c10, 4 @ memory barrier, hope SDR/DDR finished
75 movs r0, r0 @ see if DDR or SDR
|
| /Linux-v6.6/Documentation/devicetree/bindings/pinctrl/ |
| D | fsl,imx7ulp-pinctrl.txt | 4 ports and IOMUXC DDR for DDR interface.
|
| /Linux-v6.6/Documentation/accel/qaic/ |
| D | aic100.rst | 17 Each SoC has an A53 management CPU. On card, there can be up to 32 GB of DDR.
26 An AIC100 card consists of an AIC100 SoC, on-card DDR, and a set of misc
59 * DDR
98 DDR section in Hardware Description
101 AIC100 has on-card DDR. In total, an AIC100 can have up to 32 GB of DDR.
102 This DDR is used to store workloads, data for the workloads, and is used by the
103 QSM for managing the device. NSPs are granted access to sections of the DDR by
104 the QSM. The host does not have direct access to the DDR, and must make
105 requests to the QSM to transfer data to the DDR.
119 device DDR
[all …]
|
| /Linux-v6.6/Documentation/driver-api/memory-devices/ |
| D | ti-emif.rst | 38 DDR device details and other board dependent and SoC dependent
41 - DDR device details: 'struct ddr_device_info'
|
| /Linux-v6.6/drivers/memory/ |
| D | Kconfig | 11 for DRAM (SDR, DDR), ROM, SRAM and others. The drivers features
17 config DDR config
20 Data from JEDEC specs for DDR SDRAM memories,
23 DDR SDRAM controllers.
52 STB SoCs. The firmware running on the DCPU inside the DDR PHY can
93 select DDR
|
| /Linux-v6.6/drivers/memory/tegra/ |
| D | Kconfig | 19 select DDR
31 select DDR
|
| /Linux-v6.6/Documentation/devicetree/bindings/mips/img/ |
| D | xilfpga.txt | 20 - 128Mbyte DDR RAM at 0x0000_0000
74 DDR initialization is already handled by a HW IP block.
|
| /Linux-v6.6/drivers/clk/baikal-t1/ |
| D | Kconfig | 27 CPUs, DDR, etc.) or passed over the clock dividers to be only
50 can be directly asserted/de-asserted (PCIe and DDR sub-domains).
|
| /Linux-v6.6/arch/arm64/boot/dts/intel/ |
| D | keembay-evm.dts | 29 /* 2GB of DDR memory. */
|
| /Linux-v6.6/arch/mips/include/asm/mach-loongson2ef/ |
| D | loongson.h | 312 LOONGSON_ADDRWIN_CFG(CPU, DDR, win, src, dst, size)
314 LOONGSON_ADDRWIN_CFG(PCIDMA, DDR, win, src, dst, size)
|
