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Searched refs:DCORE_OFFSET (Results 1 – 3 of 3) sorted by relevance

/Linux-v6.6/drivers/accel/habanalabs/gaudi2/
Dgaudi2_security.c2764 sec_entry = DCORE_OFFSET * i + array_base + j * sizeof(u32); in gaudi2_init_pb_sm_objs()
2867 block_ctx.block_off = DCORE_OFFSET; in gaudi2_write_rr_to_all_lbw_rtrs()
3095 block_ctx.block_off = DCORE_OFFSET; in gaudi2_write_hbw_rr_to_all_mstr_if()
3189 hmmu_base = mmDCORE0_HMMU0_MMU_BASE + dcore_id * DCORE_OFFSET + in gaudi2_init_mmu_range_registers()
3235 rc |= hl_init_pb_with_mask(hdev, NUM_OF_DCORES, DCORE_OFFSET, in gaudi2_init_protection_bits()
3242 rc |= hl_init_pb(hdev, NUM_OF_DCORES, DCORE_OFFSET, 8, instance_offset, in gaudi2_init_protection_bits()
3247 rc |= hl_init_pb_with_mask(hdev, NUM_OF_DCORES, DCORE_OFFSET, in gaudi2_init_protection_bits()
3289 rc |= hl_init_pb_with_mask(hdev, NUM_OF_DCORES, DCORE_OFFSET, 2, in gaudi2_init_protection_bits()
3297 rc |= hl_init_pb_ranges_with_mask(hdev, NUM_OF_DCORES, DCORE_OFFSET, 2, in gaudi2_init_protection_bits()
3309 rc |= hl_init_pb_single_dcore(hdev, (DCORE_OFFSET * i), 5, in gaudi2_init_protection_bits()
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Dgaudi2.c2152 offset = (DCORE_OFFSET * dcore) + (DCORE_TPC_OFFSET * inst); in gaudi2_iterate_tpcs()
3267 mmDCORE0_SYNC_MNGR_OBJS_BASE + i * DCORE_OFFSET; in gaudi2_user_mapped_blocks_init()
3270 mmDCORE0_SYNC_MNGR_GLBL_BASE + i * DCORE_OFFSET; in gaudi2_user_mapped_blocks_init()
3770 qm_base = mmDCORE0_EDMA0_QM_BASE + dcore * DCORE_OFFSET + in gaudi2_stop_dma_qmans()
3881 core_base = mmDCORE0_EDMA0_CORE_BASE + dcore * DCORE_OFFSET + in gaudi2_dma_stall()
3969 qm_base = mmDCORE0_EDMA0_QM_BASE + dcore * DCORE_OFFSET + in gaudi2_disable_dma_qmans()
4339 offset = dcore_id * DCORE_OFFSET + dec_id * DCORE_VDEC_OFFSET; in gaudi2_stop_dcore_dec()
5440 dcore_id * DCORE_OFFSET + in gaudi2_init_dec()
5572 offset = (u32) (dcore_id * DCORE_OFFSET + hmmu_id * DCORE_HMMU_OFFSET); in get_hmmu_stlb_base()
5876 offset = (u32) (dcore_id * DCORE_OFFSET + hmmu_id * DCORE_HMMU_OFFSET); in gaudi2_dcore_hmmu_init()
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/Linux-v6.6/drivers/accel/habanalabs/include/gaudi2/asic_reg/
Dgaudi2_regs.h171 #define DCORE_OFFSET (mmDCORE1_TPC0_QM_BASE - mmDCORE0_TPC0_QM_BASE) macro