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Searched refs:DCE_HWIP (Results 1 – 9 of 9) sorted by relevance

/Linux-v6.6/drivers/gpu/drm/amd/amdgpu/
Ddimgrey_cavefish_reg_init.c44 adev->reg_offset[DCE_HWIP][i] = (uint32_t *)(&(DCN_BASE.instance[i])); in dimgrey_cavefish_reg_base_init()
Dvega10_reg_init.c45 adev->reg_offset[DCE_HWIP][i] = (uint32_t *)(&(DCE_BASE.instance[i])); in vega10_reg_base_init()
Dvega20_reg_init.c44 adev->reg_offset[DCE_HWIP][i] = (uint32_t *)(&(DCE_BASE.instance[i])); in vega20_reg_base_init()
Dgmc_v9_0.c1386 switch (adev->ip_versions[DCE_HWIP][0]) { in gmc_v9_0_get_vbios_fb_size()
1829 if ((adev->ip_versions[DCE_HWIP][0] == IP_VERSION(1, 0, 0)) || in gmc_v9_0_save_registers()
1830 (adev->ip_versions[DCE_HWIP][0] == IP_VERSION(1, 0, 1))) in gmc_v9_0_save_registers()
2278 if ((adev->ip_versions[DCE_HWIP][0] == IP_VERSION(1, 0, 0)) || in gmc_v9_0_restore_registers()
2279 (adev->ip_versions[DCE_HWIP][0] == IP_VERSION(1, 0, 1))) { in gmc_v9_0_restore_registers()
Damdgpu_discovery.c195 [DCE_HWIP] = DMU_HWID,
1855 if (adev->ip_versions[DCE_HWIP][0]) { in amdgpu_discovery_set_display_ip_blocks()
1856 switch (adev->ip_versions[DCE_HWIP][0]) { in amdgpu_discovery_set_display_ip_blocks()
1882 adev->ip_versions[DCE_HWIP][0]); in amdgpu_discovery_set_display_ip_blocks()
2204 adev->ip_versions[DCE_HWIP][0] = IP_VERSION(1, 0, 1); in amdgpu_discovery_set_ip_blocks()
2220 adev->ip_versions[DCE_HWIP][0] = IP_VERSION(1, 0, 0); in amdgpu_discovery_set_ip_blocks()
Damdgpu.h658 DCE_HWIP, enumerator
Damdgpu_device.c6027 if (!adev->ip_versions[DCE_HWIP][0] || in amdgpu_device_has_display_hardware()
/Linux-v6.6/drivers/gpu/drm/amd/display/amdgpu_dm/
Damdgpu_dm_plane.c1071 if (((adev->ip_versions[DCE_HWIP][0] == IP_VERSION(1, 0, 0)) || in amdgpu_dm_plane_fill_dc_scaling_info()
1072 (adev->ip_versions[DCE_HWIP][0] == IP_VERSION(1, 0, 1))) && in amdgpu_dm_plane_fill_dc_scaling_info()
1511 if (dm->adev->ip_versions[DCE_HWIP][0] > IP_VERSION(3, 0, 1) && in amdgpu_dm_plane_init()
Damdgpu_dm.c1168 switch (adev->ip_versions[DCE_HWIP][0]) { in dm_dmub_hw_init()
1600 switch (adev->ip_versions[DCE_HWIP][0]) { in amdgpu_dm_init()
1625 switch (adev->ip_versions[DCE_HWIP][0]) { in amdgpu_dm_init()
1681 init_data.dcn_reg_offsets = adev->reg_offset[DCE_HWIP][0]; in amdgpu_dm_init()
2007 switch (adev->ip_versions[DCE_HWIP][0]) { in load_dmcu_fw()
2096 switch (adev->ip_versions[DCE_HWIP][0]) { in dm_dmub_sw_init()
2465 switch (adev->ip_versions[DCE_HWIP][0]) { in amdgpu_dm_smu_write_watermarks_table()
4413 switch (adev->ip_versions[DCE_HWIP][0]) { in amdgpu_dm_initialize_drm_device()
4430 adev->ip_versions[DCE_HWIP][0]); in amdgpu_dm_initialize_drm_device()
4435 switch (adev->ip_versions[DCE_HWIP][0]) { in amdgpu_dm_initialize_drm_device()
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