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Searched refs:D5VGA_CONTROL__D5VGA_TIMING_SELECT__SHIFT (Results 1 – 19 of 19) sorted by relevance

/Linux-v6.6/drivers/gpu/drm/amd/include/asic_reg/dce/
Ddce_6_0_sh_mask.h2556 #define D5VGA_CONTROL__D5VGA_TIMING_SELECT__SHIFT 0x00000008 macro
Ddce_8_0_sh_mask.h11068 #define D5VGA_CONTROL__D5VGA_TIMING_SELECT__SHIFT 0x8 macro
Ddce_10_0_sh_mask.h11452 #define D5VGA_CONTROL__D5VGA_TIMING_SELECT__SHIFT 0x8 macro
Ddce_11_0_sh_mask.h11264 #define D5VGA_CONTROL__D5VGA_TIMING_SELECT__SHIFT 0x8 macro
Ddce_11_2_sh_mask.h12518 #define D5VGA_CONTROL__D5VGA_TIMING_SELECT__SHIFT 0x8 macro
Ddce_12_0_sh_mask.h2303 #define D5VGA_CONTROL__D5VGA_TIMING_SELECT__SHIFT … macro
/Linux-v6.6/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_3_0_3_sh_mask.h340 #define D5VGA_CONTROL__D5VGA_TIMING_SELECT__SHIFT … macro
Ddcn_3_0_1_sh_mask.h647 #define D5VGA_CONTROL__D5VGA_TIMING_SELECT__SHIFT … macro
Ddcn_2_1_0_sh_mask.h250 #define D5VGA_CONTROL__D5VGA_TIMING_SELECT__SHIFT … macro
Ddcn_3_2_1_sh_mask.h4538 #define D5VGA_CONTROL__D5VGA_TIMING_SELECT__SHIFT … macro
Ddcn_1_0_sh_mask.h1749 #define D5VGA_CONTROL__D5VGA_TIMING_SELECT__SHIFT … macro
Ddcn_3_1_5_sh_mask.h5243 #define D5VGA_CONTROL__D5VGA_TIMING_SELECT__SHIFT … macro
Ddcn_3_1_2_sh_mask.h7303 #define D5VGA_CONTROL__D5VGA_TIMING_SELECT__SHIFT … macro
Ddcn_3_0_2_sh_mask.h353 #define D5VGA_CONTROL__D5VGA_TIMING_SELECT__SHIFT … macro
Ddcn_3_1_4_sh_mask.h7888 #define D5VGA_CONTROL__D5VGA_TIMING_SELECT__SHIFT … macro
Ddcn_3_1_6_sh_mask.h7960 #define D5VGA_CONTROL__D5VGA_TIMING_SELECT__SHIFT … macro
Ddcn_3_0_0_sh_mask.h334 #define D5VGA_CONTROL__D5VGA_TIMING_SELECT__SHIFT … macro
Ddcn_2_0_0_sh_mask.h353 #define D5VGA_CONTROL__D5VGA_TIMING_SELECT__SHIFT … macro
Ddcn_3_2_0_sh_mask.h4537 #define D5VGA_CONTROL__D5VGA_TIMING_SELECT__SHIFT … macro