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Searched refs:D4VGA_CONTROL__D4VGA_TIMING_SELECT__SHIFT (Results 1 – 19 of 19) sorted by relevance

/Linux-v6.6/drivers/gpu/drm/amd/include/asic_reg/dce/
Ddce_6_0_sh_mask.h2546 #define D4VGA_CONTROL__D4VGA_TIMING_SELECT__SHIFT 0x00000008 macro
Ddce_8_0_sh_mask.h11058 #define D4VGA_CONTROL__D4VGA_TIMING_SELECT__SHIFT 0x8 macro
Ddce_10_0_sh_mask.h11442 #define D4VGA_CONTROL__D4VGA_TIMING_SELECT__SHIFT 0x8 macro
Ddce_11_0_sh_mask.h11254 #define D4VGA_CONTROL__D4VGA_TIMING_SELECT__SHIFT 0x8 macro
Ddce_11_2_sh_mask.h12508 #define D4VGA_CONTROL__D4VGA_TIMING_SELECT__SHIFT 0x8 macro
Ddce_12_0_sh_mask.h2292 #define D4VGA_CONTROL__D4VGA_TIMING_SELECT__SHIFT … macro
/Linux-v6.6/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_3_0_3_sh_mask.h329 #define D4VGA_CONTROL__D4VGA_TIMING_SELECT__SHIFT … macro
Ddcn_3_0_1_sh_mask.h636 #define D4VGA_CONTROL__D4VGA_TIMING_SELECT__SHIFT … macro
Ddcn_2_1_0_sh_mask.h239 #define D4VGA_CONTROL__D4VGA_TIMING_SELECT__SHIFT … macro
Ddcn_3_2_1_sh_mask.h4527 #define D4VGA_CONTROL__D4VGA_TIMING_SELECT__SHIFT … macro
Ddcn_1_0_sh_mask.h1738 #define D4VGA_CONTROL__D4VGA_TIMING_SELECT__SHIFT … macro
Ddcn_3_1_5_sh_mask.h5232 #define D4VGA_CONTROL__D4VGA_TIMING_SELECT__SHIFT … macro
Ddcn_3_1_2_sh_mask.h7292 #define D4VGA_CONTROL__D4VGA_TIMING_SELECT__SHIFT … macro
Ddcn_3_0_2_sh_mask.h342 #define D4VGA_CONTROL__D4VGA_TIMING_SELECT__SHIFT … macro
Ddcn_3_1_4_sh_mask.h7877 #define D4VGA_CONTROL__D4VGA_TIMING_SELECT__SHIFT … macro
Ddcn_3_1_6_sh_mask.h7949 #define D4VGA_CONTROL__D4VGA_TIMING_SELECT__SHIFT … macro
Ddcn_3_0_0_sh_mask.h323 #define D4VGA_CONTROL__D4VGA_TIMING_SELECT__SHIFT … macro
Ddcn_2_0_0_sh_mask.h342 #define D4VGA_CONTROL__D4VGA_TIMING_SELECT__SHIFT … macro
Ddcn_3_2_0_sh_mask.h4526 #define D4VGA_CONTROL__D4VGA_TIMING_SELECT__SHIFT … macro