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Searched refs:D4VGA_CONTROL__D4VGA_TIMING_SELECT_MASK (Results 1 – 19 of 19) sorted by relevance

/Linux-v6.6/drivers/gpu/drm/amd/include/asic_reg/dce/
Ddce_6_0_sh_mask.h2545 #define D4VGA_CONTROL__D4VGA_TIMING_SELECT_MASK 0x00000100L macro
Ddce_8_0_sh_mask.h11057 #define D4VGA_CONTROL__D4VGA_TIMING_SELECT_MASK 0x100 macro
Ddce_10_0_sh_mask.h11441 #define D4VGA_CONTROL__D4VGA_TIMING_SELECT_MASK 0x100 macro
Ddce_11_0_sh_mask.h11253 #define D4VGA_CONTROL__D4VGA_TIMING_SELECT_MASK 0x100 macro
Ddce_11_2_sh_mask.h12507 #define D4VGA_CONTROL__D4VGA_TIMING_SELECT_MASK 0x100 macro
Ddce_12_0_sh_mask.h2297 #define D4VGA_CONTROL__D4VGA_TIMING_SELECT_MASK … macro
/Linux-v6.6/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_3_0_3_sh_mask.h334 #define D4VGA_CONTROL__D4VGA_TIMING_SELECT_MASK … macro
Ddcn_3_0_1_sh_mask.h641 #define D4VGA_CONTROL__D4VGA_TIMING_SELECT_MASK … macro
Ddcn_2_1_0_sh_mask.h244 #define D4VGA_CONTROL__D4VGA_TIMING_SELECT_MASK … macro
Ddcn_3_2_1_sh_mask.h4532 #define D4VGA_CONTROL__D4VGA_TIMING_SELECT_MASK … macro
Ddcn_1_0_sh_mask.h1743 #define D4VGA_CONTROL__D4VGA_TIMING_SELECT_MASK … macro
Ddcn_3_1_5_sh_mask.h5237 #define D4VGA_CONTROL__D4VGA_TIMING_SELECT_MASK … macro
Ddcn_3_1_2_sh_mask.h7297 #define D4VGA_CONTROL__D4VGA_TIMING_SELECT_MASK … macro
Ddcn_3_0_2_sh_mask.h347 #define D4VGA_CONTROL__D4VGA_TIMING_SELECT_MASK … macro
Ddcn_3_1_4_sh_mask.h7882 #define D4VGA_CONTROL__D4VGA_TIMING_SELECT_MASK … macro
Ddcn_3_1_6_sh_mask.h7954 #define D4VGA_CONTROL__D4VGA_TIMING_SELECT_MASK … macro
Ddcn_3_0_0_sh_mask.h328 #define D4VGA_CONTROL__D4VGA_TIMING_SELECT_MASK … macro
Ddcn_2_0_0_sh_mask.h347 #define D4VGA_CONTROL__D4VGA_TIMING_SELECT_MASK … macro
Ddcn_3_2_0_sh_mask.h4531 #define D4VGA_CONTROL__D4VGA_TIMING_SELECT_MASK … macro