Searched refs:CRTC5_REGISTER_OFFSET (Results 1 – 5 of 5) sorted by relevance
38 #define CRTC5_REGISTER_OFFSET (0x459c - 0x1b9c) macro
44 #define CRTC5_REGISTER_OFFSET (0x4a7c - 0x1b7c) macro
62 CRTC5_REGISTER_OFFSET80 CRTC5_REGISTER_OFFSET,2910 reg_block = CRTC5_REGISTER_OFFSET; in dce_v8_0_set_crtc_vblank_interrupt_state()2961 reg_block = CRTC5_REGISTER_OFFSET; in dce_v8_0_set_crtc_vline_interrupt_state()
61 CRTC5_REGISTER_OFFSET,2723 amdgpu_crtc->crtc_offset = CRTC5_REGISTER_OFFSET; in dce_v10_0_crtc_init()
62 CRTC5_REGISTER_OFFSET,2836 amdgpu_crtc->crtc_offset = CRTC5_REGISTER_OFFSET; in dce_v11_0_crtc_init()