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Searched refs:CP_PFP_LOAD_CONTROL__CNTX_REG_EN_MASK (Results 1 – 13 of 13) sorted by relevance

/Linux-v6.6/drivers/gpu/drm/amd/include/asic_reg/gca/
Dgfx_6_0_sh_mask.h2680 #define CP_PFP_LOAD_CONTROL__CNTX_REG_EN_MASK 0x00000002L macro
Dgfx_7_2_sh_mask.h2773 #define CP_PFP_LOAD_CONTROL__CNTX_REG_EN_MASK 0x2 macro
Dgfx_8_0_sh_mask.h3343 #define CP_PFP_LOAD_CONTROL__CNTX_REG_EN_MASK 0x2 macro
Dgfx_8_1_sh_mask.h3865 #define CP_PFP_LOAD_CONTROL__CNTX_REG_EN_MASK 0x2 macro
/Linux-v6.6/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_0_sh_mask.h19561 #define CP_PFP_LOAD_CONTROL__CNTX_REG_EN_MASK … macro
Dgc_9_2_1_sh_mask.h20799 #define CP_PFP_LOAD_CONTROL__CNTX_REG_EN_MASK … macro
Dgc_9_4_3_sh_mask.h22927 #define CP_PFP_LOAD_CONTROL__CNTX_REG_EN_MASK … macro
Dgc_9_1_sh_mask.h20872 #define CP_PFP_LOAD_CONTROL__CNTX_REG_EN_MASK … macro
Dgc_9_4_2_sh_mask.h13026 #define CP_PFP_LOAD_CONTROL__CNTX_REG_EN_MASK … macro
Dgc_11_0_0_sh_mask.h26922 #define CP_PFP_LOAD_CONTROL__CNTX_REG_EN_MASK … macro
Dgc_10_1_0_sh_mask.h27484 #define CP_PFP_LOAD_CONTROL__CNTX_REG_EN_MASK … macro
Dgc_11_0_3_sh_mask.h29422 #define CP_PFP_LOAD_CONTROL__CNTX_REG_EN_MASK … macro
Dgc_10_3_0_sh_mask.h25746 #define CP_PFP_LOAD_CONTROL__CNTX_REG_EN_MASK … macro