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Searched refs:CP_HQD_SEMA_CMD__RESULT_MASK (Results 1 – 12 of 12) sorted by relevance

/Linux-v6.6/drivers/gpu/drm/amd/include/asic_reg/gca/
Dgfx_7_2_sh_mask.h3413 #define CP_HQD_SEMA_CMD__RESULT_MASK 0x6 macro
Dgfx_8_0_sh_mask.h4047 #define CP_HQD_SEMA_CMD__RESULT_MASK 0x6 macro
Dgfx_8_1_sh_mask.h4569 #define CP_HQD_SEMA_CMD__RESULT_MASK 0x6 macro
/Linux-v6.6/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_0_sh_mask.h13003 #define CP_HQD_SEMA_CMD__RESULT_MASK … macro
Dgc_9_1_sh_mask.h14307 #define CP_HQD_SEMA_CMD__RESULT_MASK … macro
Dgc_9_2_1_sh_mask.h14172 #define CP_HQD_SEMA_CMD__RESULT_MASK … macro
Dgc_9_4_3_sh_mask.h16539 #define CP_HQD_SEMA_CMD__RESULT_MASK … macro
Dgc_9_4_2_sh_mask.h4105 #define CP_HQD_SEMA_CMD__RESULT_MASK … macro
Dgc_11_0_0_sh_mask.h17500 #define CP_HQD_SEMA_CMD__RESULT_MASK … macro
Dgc_10_1_0_sh_mask.h20424 #define CP_HQD_SEMA_CMD__RESULT_MASK … macro
Dgc_11_0_3_sh_mask.h19741 #define CP_HQD_SEMA_CMD__RESULT_MASK … macro
Dgc_10_3_0_sh_mask.h18577 #define CP_HQD_SEMA_CMD__RESULT_MASK … macro