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Searched refs:CP_HQD_PQ_BASE__ADDR_MASK (Results 1 – 12 of 12) sorted by relevance

/Linux-v6.6/drivers/gpu/drm/amd/include/asic_reg/gca/
Dgfx_7_2_sh_mask.h3313 #define CP_HQD_PQ_BASE__ADDR_MASK 0xffffffff macro
Dgfx_8_0_sh_mask.h3921 #define CP_HQD_PQ_BASE__ADDR_MASK 0xffffffff macro
Dgfx_8_1_sh_mask.h4443 #define CP_HQD_PQ_BASE__ADDR_MASK 0xffffffff macro
/Linux-v6.6/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_0_sh_mask.h12851 #define CP_HQD_PQ_BASE__ADDR_MASK … macro
Dgc_9_1_sh_mask.h14155 #define CP_HQD_PQ_BASE__ADDR_MASK … macro
Dgc_9_2_1_sh_mask.h14020 #define CP_HQD_PQ_BASE__ADDR_MASK … macro
Dgc_9_4_3_sh_mask.h16383 #define CP_HQD_PQ_BASE__ADDR_MASK … macro
Dgc_9_4_2_sh_mask.h3951 #define CP_HQD_PQ_BASE__ADDR_MASK … macro
Dgc_11_0_0_sh_mask.h17332 #define CP_HQD_PQ_BASE__ADDR_MASK … macro
Dgc_10_1_0_sh_mask.h20266 #define CP_HQD_PQ_BASE__ADDR_MASK … macro
Dgc_11_0_3_sh_mask.h19571 #define CP_HQD_PQ_BASE__ADDR_MASK … macro
Dgc_10_3_0_sh_mask.h18421 #define CP_HQD_PQ_BASE__ADDR_MASK … macro