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Searched refs:CMU_REG9_PLL_POST_DIVBY2_SET (Results 1 – 1 of 1) sorted by relevance

/Linux-v6.6/drivers/phy/
Dphy-xgene.c187 #define CMU_REG9_PLL_POST_DIVBY2_SET(dst, src) \ macro
863 val = CMU_REG9_PLL_POST_DIVBY2_SET(val, 0x1); in xgene_phy_sata_cfg_cmu_core()