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Searched refs:CLK_VPP1_SVPP3_VDO1_DL_RELAY (Results 1 – 4 of 4) sorted by relevance

/Linux-v6.6/drivers/clk/mediatek/
Dclk-mt8195-vpp1.c51 GATE_VPP1_0(CLK_VPP1_SVPP3_VDO1_DL_RELAY, "vpp1_svpp3_vdo1_dl_relay", "top_vpp", 18),
Dclk-mt8188-vpp1.c53 GATE_VPP1_0(CLK_VPP1_SVPP3_VDO1_DL_RELAY, "vpp1_svpp3_vdo1_dl_relay", "top_vpp", 19),
/Linux-v6.6/include/dt-bindings/clock/
Dmediatek,mt8188-clk.h459 #define CLK_VPP1_SVPP3_VDO1_DL_RELAY 19 macro
Dmt8195-clk.h562 #define CLK_VPP1_SVPP3_VDO1_DL_RELAY 18 macro