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Searched refs:CLK_TOP_ETHER_50M_RMII_SEL (Results 1 – 3 of 3) sorted by relevance

/Linux-v6.6/include/dt-bindings/clock/
Dmt2712-clk.h189 #define CLK_TOP_ETHER_50M_RMII_SEL 158 macro
/Linux-v6.6/drivers/clk/mediatek/
Dclk-mt2712.c738 MUX_GATE(CLK_TOP_ETHER_50M_RMII_SEL, "ether_sel", ether_parents, 0x550, 0, 2, 7),
/Linux-v6.6/arch/arm64/boot/dts/mediatek/
Dmt2712e.dtsi744 <&topckgen CLK_TOP_ETHER_50M_RMII_SEL>;
747 <&topckgen CLK_TOP_ETHER_50M_RMII_SEL>;