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Searched refs:CLK_TOP_DPILVDS1_SEL (Results 1 – 2 of 2) sorted by relevance

/Linux-v6.6/include/dt-bindings/clock/
Dmt2712-clk.h150 #define CLK_TOP_DPILVDS1_SEL 119 macro
/Linux-v6.6/drivers/clk/mediatek/
Dclk-mt2712.c678 MUX_GATE(CLK_TOP_DPILVDS1_SEL, "dpilvds1_sel", dpilvds1_parents,