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Searched refs:CLK_TOP_AUDINTBUS_SEL (Results 1 – 2 of 2) sorted by relevance

/Linux-v6.6/include/dt-bindings/clock/
Dmt2701-clk.h99 #define CLK_TOP_AUDINTBUS_SEL 88 macro
/Linux-v6.6/drivers/clk/mediatek/
Dclk-mt2701.c520 MUX_GATE(CLK_TOP_AUDINTBUS_SEL, "aud_intbus_sel", aud_intbus_parents,