Searched refs:CLK_TOP_APLL2_DIV5 (Results 1 – 4 of 4) sorted by relevance
| /Linux-v6.6/include/dt-bindings/clock/ |
| D | mediatek,mt6795-clk.h | 137 #define CLK_TOP_APLL2_DIV5 126 macro
|
| D | mt8173-clk.h | 142 #define CLK_TOP_APLL2_DIV5 132 macro
|
| /Linux-v6.6/drivers/clk/mediatek/ |
| D | clk-mt6795-topckgen.c | 523 DIV_GATE(CLK_TOP_APLL2_DIV5, "apll2_div5", "apll2_div4", 0x12c, 21, 0x12c, 4, 4),
|
| D | clk-mt8173-topckgen.c | 618 DIV_GATE(CLK_TOP_APLL2_DIV5, "apll2_div5", "apll2_div4", 0x12c, 21, 0x12c, 4, 4),
|
