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Searched refs:CLKDEV_CON_ID (Results 1 – 18 of 18) sorted by relevance

/Linux-v6.6/arch/sh/kernel/cpu/sh4a/
Dclock-sh7366.c185 CLKDEV_CON_ID("rclk", &r_clk),
186 CLKDEV_CON_ID("extal", &extal_clk),
187 CLKDEV_CON_ID("dll_clk", &dll_clk),
188 CLKDEV_CON_ID("pll_clk", &pll_clk),
191 CLKDEV_CON_ID("cpu_clk", &div4_clks[DIV4_I]),
192 CLKDEV_CON_ID("umem_clk", &div4_clks[DIV4_U]),
193 CLKDEV_CON_ID("shyway_clk", &div4_clks[DIV4_SH]),
194 CLKDEV_CON_ID("bus_clk", &div4_clks[DIV4_B]),
195 CLKDEV_CON_ID("b3_clk", &div4_clks[DIV4_B3]),
196 CLKDEV_CON_ID("peripheral_clk", &div4_clks[DIV4_P]),
[all …]
Dclock-sh7343.c187 CLKDEV_CON_ID("rclk", &r_clk),
188 CLKDEV_CON_ID("extal", &extal_clk),
189 CLKDEV_CON_ID("dll_clk", &dll_clk),
190 CLKDEV_CON_ID("pll_clk", &pll_clk),
193 CLKDEV_CON_ID("cpu_clk", &div4_clks[DIV4_I]),
194 CLKDEV_CON_ID("umem_clk", &div4_clks[DIV4_U]),
195 CLKDEV_CON_ID("shyway_clk", &div4_clks[DIV4_SH]),
196 CLKDEV_CON_ID("bus_clk", &div4_clks[DIV4_B]),
197 CLKDEV_CON_ID("b3_clk", &div4_clks[DIV4_B3]),
198 CLKDEV_CON_ID("peripheral_clk", &div4_clks[DIV4_P]),
[all …]
Dclock-sh7734.c180 CLKDEV_CON_ID("extal", &extal_clk),
181 CLKDEV_CON_ID("pll_clk", &pll_clk),
184 CLKDEV_CON_ID("cpu_clk", &div4_clks[DIV4_I]),
185 CLKDEV_CON_ID("shyway_clk", &div4_clks[DIV4_S]),
186 CLKDEV_CON_ID("ddr_clk", &div4_clks[DIV4_M]),
187 CLKDEV_CON_ID("bus_clk", &div4_clks[DIV4_B]),
188 CLKDEV_CON_ID("shyway_clk1", &div4_clks[DIV4_S1]),
189 CLKDEV_CON_ID("peripheral_clk", &div4_clks[DIV4_P]),
200 CLKDEV_CON_ID("hscif", &mstp_clks[MSTP019]),
204 CLKDEV_CON_ID("ssi0", &mstp_clks[MSTP012]),
[all …]
Dclock-sh7723.c196 CLKDEV_CON_ID("rclk", &r_clk),
197 CLKDEV_CON_ID("extal", &extal_clk),
198 CLKDEV_CON_ID("dll_clk", &dll_clk),
199 CLKDEV_CON_ID("pll_clk", &pll_clk),
202 CLKDEV_CON_ID("cpu_clk", &div4_clks[DIV4_I]),
203 CLKDEV_CON_ID("umem_clk", &div4_clks[DIV4_U]),
204 CLKDEV_CON_ID("shyway_clk", &div4_clks[DIV4_SH]),
205 CLKDEV_CON_ID("bus_clk", &div4_clks[DIV4_B]),
206 CLKDEV_CON_ID("b3_clk", &div4_clks[DIV4_B3]),
207 CLKDEV_CON_ID("peripheral_clk", &div4_clks[DIV4_P]),
[all …]
Dclock-sh7786.c127 CLKDEV_CON_ID("extal", &extal_clk),
128 CLKDEV_CON_ID("pll_clk", &pll_clk),
131 CLKDEV_CON_ID("peripheral_clk", &div4_clks[DIV4_P]),
132 CLKDEV_CON_ID("du_clk", &div4_clks[DIV4_DU]),
133 CLKDEV_CON_ID("ddr_clk", &div4_clks[DIV4_DDR]),
134 CLKDEV_CON_ID("bus_clk", &div4_clks[DIV4_B]),
135 CLKDEV_CON_ID("shyway_clk", &div4_clks[DIV4_SH]),
136 CLKDEV_CON_ID("cpu_clk", &div4_clks[DIV4_I]),
146 CLKDEV_CON_ID("ssi3_fck", &mstp_clks[MSTP023]),
147 CLKDEV_CON_ID("ssi2_fck", &mstp_clks[MSTP022]),
[all …]
Dclock-sh7724.c261 CLKDEV_CON_ID("rclk", &r_clk),
262 CLKDEV_CON_ID("extal", &extal_clk),
263 CLKDEV_CON_ID("fll_clk", &fll_clk),
264 CLKDEV_CON_ID("pll_clk", &pll_clk),
265 CLKDEV_CON_ID("div3_clk", &div3_clk),
268 CLKDEV_CON_ID("cpu_clk", &div4_clks[DIV4_I]),
269 CLKDEV_CON_ID("shyway_clk", &div4_clks[DIV4_SH]),
270 CLKDEV_CON_ID("bus_clk", &div4_clks[DIV4_B]),
271 CLKDEV_CON_ID("peripheral_clk", &div4_clks[DIV4_P]),
272 CLKDEV_CON_ID("vpu_clk", &div4_clks[DIV4_M1]),
[all …]
Dclock-sh7785.c118 CLKDEV_CON_ID("extal", &extal_clk),
119 CLKDEV_CON_ID("pll_clk", &pll_clk),
122 CLKDEV_CON_ID("peripheral_clk", &div4_clks[DIV4_P]),
123 CLKDEV_CON_ID("du_clk", &div4_clks[DIV4_DU]),
124 CLKDEV_CON_ID("ga_clk", &div4_clks[DIV4_GA]),
125 CLKDEV_CON_ID("ddr_clk", &div4_clks[DIV4_DDR]),
126 CLKDEV_CON_ID("bus_clk", &div4_clks[DIV4_B]),
127 CLKDEV_CON_ID("shyway_clk", &div4_clks[DIV4_SH]),
128 CLKDEV_CON_ID("umem_clk", &div4_clks[DIV4_U]),
129 CLKDEV_CON_ID("cpu_clk", &div4_clks[DIV4_I]),
[all …]
Dclock-sh7722.c171 CLKDEV_CON_ID("rclk", &r_clk),
172 CLKDEV_CON_ID("extal", &extal_clk),
173 CLKDEV_CON_ID("dll_clk", &dll_clk),
174 CLKDEV_CON_ID("pll_clk", &pll_clk),
177 CLKDEV_CON_ID("cpu_clk", &div4_clks[DIV4_I]),
178 CLKDEV_CON_ID("umem_clk", &div4_clks[DIV4_U]),
179 CLKDEV_CON_ID("shyway_clk", &div4_clks[DIV4_SH]),
180 CLKDEV_CON_ID("bus_clk", &div4_clks[DIV4_B]),
181 CLKDEV_CON_ID("b3_clk", &div4_clks[DIV4_B3]),
182 CLKDEV_CON_ID("peripheral_clk", &div4_clks[DIV4_P]),
[all …]
Dclock-sh7757.c104 CLKDEV_CON_ID("extal", &extal_clk),
105 CLKDEV_CON_ID("pll_clk", &pll_clk),
108 CLKDEV_CON_ID("peripheral_clk", &div4_clks[DIV4_P]),
109 CLKDEV_CON_ID("shyway_clk", &div4_clks[DIV4_SH]),
110 CLKDEV_CON_ID("cpu_clk", &div4_clks[DIV4_I]),
114 CLKDEV_CON_ID("riic0", &mstp_clks[MSTP000]),
115 CLKDEV_CON_ID("riic1", &mstp_clks[MSTP000]),
116 CLKDEV_CON_ID("riic2", &mstp_clks[MSTP000]),
117 CLKDEV_CON_ID("riic3", &mstp_clks[MSTP000]),
118 CLKDEV_CON_ID("riic4", &mstp_clks[MSTP000]),
[all …]
Dclock-shx3.c102 CLKDEV_CON_ID("extal", &extal_clk),
103 CLKDEV_CON_ID("pll_clk", &pll_clk),
106 CLKDEV_CON_ID("peripheral_clk", &div4_clks[DIV4_P]),
107 CLKDEV_CON_ID("shywaya_clk", &div4_clks[DIV4_SHA]),
108 CLKDEV_CON_ID("ddr_clk", &div4_clks[DIV4_DDR]),
109 CLKDEV_CON_ID("bus_clk", &div4_clks[DIV4_B]),
110 CLKDEV_CON_ID("shyway_clk", &div4_clks[DIV4_SH]),
111 CLKDEV_CON_ID("cpu_clk", &div4_clks[DIV4_I]),
119 CLKDEV_CON_ID("h8ex_fck", &mstp_clks[MSTP003]),
120 CLKDEV_CON_ID("csm_fck", &mstp_clks[MSTP002]),
[all …]
Dclock-sh7763.c93 CLKDEV_CON_ID("shyway_clk", &sh7763_shyway_clk),
Dclock-sh7780.c99 CLKDEV_CON_ID("shyway_clk", &sh7780_shyway_clk),
/Linux-v6.6/arch/sh/kernel/cpu/sh2a/
Dclock-sh7264.c106 CLKDEV_CON_ID("rclk", &r_clk),
107 CLKDEV_CON_ID("extal", &extal_clk),
108 CLKDEV_CON_ID("pll_clk", &pll_clk),
111 CLKDEV_CON_ID("cpu_clk", &div4_clks[DIV4_I]),
112 CLKDEV_CON_ID("peripheral_clk", &div4_clks[DIV4_P]),
123 CLKDEV_CON_ID("vdc3", &mstp_clks[MSTP74]),
125 CLKDEV_CON_ID("usb0", &mstp_clks[MSTP60]),
127 CLKDEV_CON_ID("sdhi0", &mstp_clks[MSTP34]),
128 CLKDEV_CON_ID("sdhi1", &mstp_clks[MSTP33]),
129 CLKDEV_CON_ID("adc0", &mstp_clks[MSTP32]),
[all …]
Dclock-sh7269.c140 CLKDEV_CON_ID("rclk", &r_clk),
141 CLKDEV_CON_ID("extal", &extal_clk),
142 CLKDEV_CON_ID("pll_clk", &pll_clk),
143 CLKDEV_CON_ID("peripheral_clk", &peripheral1_clk),
146 CLKDEV_CON_ID("cpu_clk", &div4_clks[DIV4_I]),
147 CLKDEV_CON_ID("bus_clk", &div4_clks[DIV4_B]),
159 CLKDEV_CON_ID("usb0", &mstp_clks[MSTP60]),
161 CLKDEV_CON_ID("adc0", &mstp_clks[MSTP32]),
162 CLKDEV_CON_ID("rtc0", &mstp_clks[MSTP30]),
/Linux-v6.6/arch/sh/kernel/cpu/
Dclock-cpg.c41 CLKDEV_CON_ID("master_clk", &master_clk),
42 CLKDEV_CON_ID("peripheral_clk", &peripheral_clk),
43 CLKDEV_CON_ID("bus_clk", &bus_clk),
44 CLKDEV_CON_ID("cpu_clk", &cpu_clk),
/Linux-v6.6/arch/sh/kernel/cpu/sh4/
Dclock-sh4-202.c149 CLKDEV_CON_ID("emi_clk", &sh4202_emi_clk),
150 CLKDEV_CON_ID("femi_clk", &sh4202_femi_clk),
151 CLKDEV_CON_ID("shoc_clk", &sh4202_shoc_clk),
/Linux-v6.6/include/linux/
Dsh_clk.h200 #define CLKDEV_CON_ID(_id, _clk) { .con_id = _id, .clk = _clk } macro
/Linux-v6.6/arch/sh/boards/mach-highlander/
Dsetup.c337 CLKDEV_CON_ID("ivdr_clk", &ivdr_clk),