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Searched refs:CGTS_RD_CTRL_REG__REG_MUX_SEL_MASK (Results 1 – 11 of 11) sorted by relevance

/Linux-v6.6/drivers/gpu/drm/amd/include/asic_reg/gca/
Dgfx_6_0_sh_mask.h978 #define CGTS_RD_CTRL_REG__REG_MUX_SEL_MASK 0x00001f00L macro
Dgfx_7_2_sh_mask.h9333 #define CGTS_RD_CTRL_REG__REG_MUX_SEL_MASK 0x1f00 macro
Dgfx_8_0_sh_mask.h11057 #define CGTS_RD_CTRL_REG__REG_MUX_SEL_MASK 0x1f00 macro
Dgfx_8_1_sh_mask.h11455 #define CGTS_RD_CTRL_REG__REG_MUX_SEL_MASK 0x1f00 macro
/Linux-v6.6/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_0_sh_mask.h23929 #define CGTS_RD_CTRL_REG__REG_MUX_SEL_MASK … macro
Dgc_9_2_1_sh_mask.h25351 #define CGTS_RD_CTRL_REG__REG_MUX_SEL_MASK … macro
Dgc_9_4_3_sh_mask.h27724 #define CGTS_RD_CTRL_REG__REG_MUX_SEL_MASK … macro
Dgc_9_1_sh_mask.h25220 #define CGTS_RD_CTRL_REG__REG_MUX_SEL_MASK … macro
Dgc_9_4_2_sh_mask.h17730 #define CGTS_RD_CTRL_REG__REG_MUX_SEL_MASK … macro
Dgc_10_1_0_sh_mask.h35430 #define CGTS_RD_CTRL_REG__REG_MUX_SEL_MASK … macro
Dgc_10_3_0_sh_mask.h34608 #define CGTS_RD_CTRL_REG__REG_MUX_SEL_MASK … macro