Searched refs:CE4100_SSCR1_RFT (Results 1 – 2 of 2) sorted by relevance
104 #define CE4100_SSCR1_RFT GENMASK(11, 10) /* Receive FIFO Threshold (mask) */ macro
64 | CE4100_SSCR1_RFT | CE4100_SSCR1_TFT | SSCR1_MWDS \266 mask = CE4100_SSCR1_RFT; in pxa2xx_spi_clear_rx_thre()598 mask |= CE4100_SSCR1_RFT; in reset_sccr1()1296 chip->threshold = (CE4100_SSCR1_RxTresh(rx_thres) & CE4100_SSCR1_RFT) | in setup()
