Searched refs:ARM_SMMU_GERROR_IRQ_CFG0 (Results 1 – 2 of 2) sorted by relevance
128 #define ARM_SMMU_GERROR_IRQ_CFG0 0x68 macro
58 ARM_SMMU_GERROR_IRQ_CFG0,3168 writeq_relaxed(0, smmu->base + ARM_SMMU_GERROR_IRQ_CFG0); in arm_smmu_setup_msis()
