Searched refs:APR (Results 1 – 4 of 4) sorted by relevance
264 tristate "Qualcomm APR/GPR Bus (Asynchronous/Generic Packet Router)"270 Enable APR IPC protocol support between271 application processor and QDSP6. APR is
68 APR, enumerator
88 [APR] = 0x0554,163 [APR] = 0x0354,211 [APR] = 0x0154,297 [APR] = 0x01b8,1524 sh_eth_write(ndev, 1, APR); in sh_eth_dev_init()2135 add_reg(APR); in __sh_eth_get_regs()
98 guest. This interface always exposes four register APR[0-3] describing the
