Home
last modified time | relevance | path

Searched refs:ANA_CL_QOS_CFG_DSCP_REWR_MODE_SEL (Results 1 – 2 of 2) sorted by relevance

/Linux-v6.6/drivers/net/ethernet/microchip/sparx5/
Dsparx5_port.c1254 ANA_CL_QOS_CFG_DSCP_REWR_MODE_SEL, port->sparx5, in sparx5_port_qos_dscp_rewr_mode_set()
Dsparx5_main_regs.h1322 #define ANA_CL_QOS_CFG_DSCP_REWR_MODE_SEL GENMASK(13, 12) macro
1324 FIELD_PREP(ANA_CL_QOS_CFG_DSCP_REWR_MODE_SEL, x)
1326 FIELD_GET(ANA_CL_QOS_CFG_DSCP_REWR_MODE_SEL, x)