Searched refs:AMDGPU_MAX_RINGS (Results 1 – 11 of 11) sorted by relevance
601 for (i = 0; i < AMDGPU_MAX_RINGS; i++) { in amdgpu_fence_driver_hw_fini()631 for (i = 0; i < AMDGPU_MAX_RINGS; i++) { in amdgpu_fence_driver_isr_toggle()648 for (i = 0; i < AMDGPU_MAX_RINGS; i++) { in amdgpu_fence_driver_sw_fini()687 for (i = 0; i < AMDGPU_MAX_RINGS; i++) { in amdgpu_fence_driver_hw_init()901 for (i = 0; i < AMDGPU_MAX_RINGS; ++i) { in amdgpu_debugfs_fence_info_show()
356 unsigned seqno[AMDGPU_MAX_RINGS];367 struct drm_gpu_scheduler *vm_pte_scheds[AMDGPU_MAX_RINGS];
1659 for (i = 0; i < AMDGPU_MAX_RINGS; i++) { in amdgpu_debugfs_test_ib_show()1675 for (i = 0; i < AMDGPU_MAX_RINGS; i++) { in amdgpu_debugfs_test_ib_show()1895 if (val >= AMDGPU_MAX_RINGS) in amdgpu_debugfs_ib_preempt()2142 for (i = 0; i < AMDGPU_MAX_RINGS; ++i) { in amdgpu_debugfs_init()
2260 for (i = 0; i < AMDGPU_MAX_RINGS; ++i) { in amdgpu_device_init_schedulers()3532 adev->fence_context = dma_fence_context_alloc(AMDGPU_MAX_RINGS); in amdgpu_device_init()4588 for (i = 0; i < AMDGPU_MAX_RINGS; ++i) { in amdgpu_device_has_job_running()4727 for (i = 0; i < AMDGPU_MAX_RINGS; ++i) { in amdgpu_device_pre_asic_reset()5266 for (i = 0; i < AMDGPU_MAX_RINGS; ++i) { in amdgpu_device_gpu_recover()5341 for (i = 0; i < AMDGPU_MAX_RINGS; ++i) { in amdgpu_device_gpu_recover()5667 for (i = 0; i < AMDGPU_MAX_RINGS; ++i) { in amdgpu_pci_error_detected()5795 for (i = 0; i < AMDGPU_MAX_RINGS; ++i) { in amdgpu_pci_resume()
219 if (adev->num_rings >= AMDGPU_MAX_RINGS) in amdgpu_ring_init()
40 #define AMDGPU_MAX_RINGS 124 macro
135 for (i = 0; i < AMDGPU_MAX_RINGS; i++) { in aqua_vanjaram_xcp_sched_list_update()
2408 dma_fence_context_alloc(AMDGPU_MAX_RINGS); in amdgpu_vm_manager_init()2409 for (i = 0; i < AMDGPU_MAX_RINGS; ++i) in amdgpu_vm_manager_init()
898 struct amdgpu_ring *rings[AMDGPU_MAX_RINGS];
2573 for (i = 0; i < AMDGPU_MAX_RINGS; i++) { in amdgpu_pmops_runtime_suspend()
503 for (i = 0; i < AMDGPU_MAX_RINGS; i++) { in amdgpu_dpm_compute_clocks()
