Searched refs:AMDGPU_IRQ_STATE_DISABLE (Results 1 – 25 of 30) sorted by relevance
12
42 AMDGPU_IRQ_STATE_DISABLE, enumerator
143 AMDGPU_IRQ_STATE_DISABLE); in amdgpu_irq_disable_all()524 state = AMDGPU_IRQ_STATE_DISABLE; in amdgpu_irq_update()
595 case AMDGPU_IRQ_STATE_DISABLE: in si_dma_set_trap_irq_state()611 case AMDGPU_IRQ_STATE_DISABLE: in si_dma_set_trap_irq_state()
1005 case AMDGPU_IRQ_STATE_DISABLE: in sdma_v2_4_set_trap_irq_state()1021 case AMDGPU_IRQ_STATE_DISABLE: in sdma_v2_4_set_trap_irq_state()
191 amdgpu_crtc->vsync_timer_enabled = AMDGPU_IRQ_STATE_DISABLE; in amdgpu_vkms_crtc_init()
1112 case AMDGPU_IRQ_STATE_DISABLE: in cik_sdma_set_trap_irq_state()1128 case AMDGPU_IRQ_STATE_DISABLE: in cik_sdma_set_trap_irq_state()
1339 case AMDGPU_IRQ_STATE_DISABLE: in sdma_v3_0_set_trap_irq_state()1355 case AMDGPU_IRQ_STATE_DISABLE: in sdma_v3_0_set_trap_irq_state()
2918 case AMDGPU_IRQ_STATE_DISABLE: in dce_v8_0_set_crtc_vblank_interrupt_state()2969 case AMDGPU_IRQ_STATE_DISABLE: in dce_v8_0_set_crtc_vline_interrupt_state()2997 case AMDGPU_IRQ_STATE_DISABLE: in dce_v8_0_set_hpd_interrupt_state()3112 if (state == AMDGPU_IRQ_STATE_DISABLE) in dce_v8_0_set_pageflip_interrupt_state()
1037 case AMDGPU_IRQ_STATE_DISABLE: in gmc_v6_0_vm_fault_interrupt_state()
2997 case AMDGPU_IRQ_STATE_DISABLE: in dce_v10_0_set_crtc_vblank_interrupt_state()3026 case AMDGPU_IRQ_STATE_DISABLE: in dce_v10_0_set_crtc_vline_interrupt_state()3056 case AMDGPU_IRQ_STATE_DISABLE: in dce_v10_0_set_hpd_irq_state()3134 if (state == AMDGPU_IRQ_STATE_DISABLE) in dce_v10_0_set_pageflip_irq_state()
3205 case AMDGPU_IRQ_STATE_DISABLE: in gfx_v6_0_set_gfx_eop_interrupt_state()3226 case AMDGPU_IRQ_STATE_DISABLE: in gfx_v6_0_set_compute_eop_interrupt_state()3268 case AMDGPU_IRQ_STATE_DISABLE: in gfx_v6_0_set_priv_reg_fault_state()3293 case AMDGPU_IRQ_STATE_DISABLE: in gfx_v6_0_set_priv_inst_fault_state()
65 case AMDGPU_IRQ_STATE_DISABLE: in gmc_v11_0_vm_fault_interrupt_state()
3128 case AMDGPU_IRQ_STATE_DISABLE: in dce_v11_0_set_crtc_vblank_interrupt_state()3157 case AMDGPU_IRQ_STATE_DISABLE: in dce_v11_0_set_crtc_vline_interrupt_state()3187 case AMDGPU_IRQ_STATE_DISABLE: in dce_v11_0_set_hpd_irq_state()3265 if (state == AMDGPU_IRQ_STATE_DISABLE) in dce_v11_0_set_pageflip_irq_state()
431 case AMDGPU_IRQ_STATE_DISABLE: in gmc_v9_0_ecc_interrupt_state()483 case AMDGPU_IRQ_STATE_DISABLE: in gmc_v9_0_vm_fault_interrupt_state()
4666 case AMDGPU_IRQ_STATE_DISABLE: in gfx_v7_0_set_gfx_eop_interrupt_state()4717 case AMDGPU_IRQ_STATE_DISABLE: in gfx_v7_0_set_compute_eop_interrupt_state()4740 case AMDGPU_IRQ_STATE_DISABLE: in gfx_v7_0_set_priv_reg_fault_state()4765 case AMDGPU_IRQ_STATE_DISABLE: in gfx_v7_0_set_priv_inst_fault_state()
70 case AMDGPU_IRQ_STATE_DISABLE: in gmc_v10_0_vm_fault_interrupt_state()
2874 case AMDGPU_IRQ_STATE_DISABLE: in dce_v6_0_set_crtc_vblank_interrupt_state()2909 case AMDGPU_IRQ_STATE_DISABLE: in dce_v6_0_set_hpd_interrupt_state()3024 if (state == AMDGPU_IRQ_STATE_DISABLE) in dce_v6_0_set_pageflip_interrupt_state()
6414 state == AMDGPU_IRQ_STATE_DISABLE ? 0 : 1); in gfx_v8_0_set_gfx_eop_interrupt_state()6453 case AMDGPU_IRQ_STATE_DISABLE: in gfx_v8_0_set_compute_eop_interrupt_state()6474 state == AMDGPU_IRQ_STATE_DISABLE ? 0 : 1); in gfx_v8_0_set_priv_reg_fault_state()6485 state == AMDGPU_IRQ_STATE_DISABLE ? 0 : 1); in gfx_v8_0_set_priv_inst_fault_state()6537 case AMDGPU_IRQ_STATE_DISABLE: in gfx_v8_0_set_cp_ecc_int_state()6582 case AMDGPU_IRQ_STATE_DISABLE: in gfx_v8_0_set_sq_int_state()
1234 case AMDGPU_IRQ_STATE_DISABLE: in gmc_v7_0_vm_fault_interrupt_state()
5731 case AMDGPU_IRQ_STATE_DISABLE: in gfx_v11_0_set_gfx_eop_interrupt_state()5788 case AMDGPU_IRQ_STATE_DISABLE: in gfx_v11_0_set_compute_eop_interrupt_state()5900 case AMDGPU_IRQ_STATE_DISABLE: in gfx_v11_0_set_priv_reg_fault_state()5919 case AMDGPU_IRQ_STATE_DISABLE: in gfx_v11_0_set_priv_inst_fault_state()6009 if (state == AMDGPU_IRQ_STATE_DISABLE) {
5707 case AMDGPU_IRQ_STATE_DISABLE: in gfx_v9_0_set_gfx_eop_interrupt_state()5754 case AMDGPU_IRQ_STATE_DISABLE: in gfx_v9_0_set_compute_eop_interrupt_state()5777 case AMDGPU_IRQ_STATE_DISABLE: in gfx_v9_0_set_priv_reg_fault_state()5796 case AMDGPU_IRQ_STATE_DISABLE: in gfx_v9_0_set_priv_inst_fault_state()5823 case AMDGPU_IRQ_STATE_DISABLE: in gfx_v9_0_set_cp_ecc_error_state()
2740 case AMDGPU_IRQ_STATE_DISABLE: in gfx_v9_4_3_xcc_set_compute_eop_interrupt_state()2766 case AMDGPU_IRQ_STATE_DISABLE: in gfx_v9_4_3_set_priv_reg_fault_state()2789 case AMDGPU_IRQ_STATE_DISABLE: in gfx_v9_4_3_set_priv_inst_fault_state()
1396 case AMDGPU_IRQ_STATE_DISABLE: in gmc_v8_0_vm_fault_interrupt_state()
3124 case AMDGPU_IRQ_STATE_DISABLE: in kv_dpm_set_interrupt_state()3141 case AMDGPU_IRQ_STATE_DISABLE: in kv_dpm_set_interrupt_state()
1338 case AMDGPU_IRQ_STATE_DISABLE: in smu_v11_0_set_irq_state()